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公开(公告)号:US20240275700A1
公开(公告)日:2024-08-15
申请号:US18568470
申请日:2021-06-11
发明人: Saki Hatta , Hiroyuki Uzawa , Shuhei Yoshida , Koyo Nitta
IPC分类号: H04L43/062 , H04L43/067 , H04L43/16
CPC分类号: H04L43/062 , H04L43/067 , H04L43/16
摘要: A packet capture device a packet analysis unit that analyzes an input packet; a flow identification unit that identifies a flow as a capture target; an output adjustment unit that adjusts a packet amount of the flow as the capture target to be output to a storage unit; a buffer unit that temporarily accumulates a packet of the flow as the capture target; and the storage unit that stores the packet of the flow as the capture target, in which the output adjustment unit is configured to decide whether to output the packet of the flow as the capture target to the storage unit for each predetermined measurement interval on the basis of a measurement result of the packet amount of the capture target in a predetermined measurement interval, and discard the packet not to be output to the storage unit.
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公开(公告)号:US12010045B2
公开(公告)日:2024-06-11
申请号:US17440241
申请日:2020-04-08
发明人: Tomoaki Kawamura , Shoko Oteru , Yuta Ukon , Shuhei Yoshida
IPC分类号: H04L49/9057 , H04L49/9047
CPC分类号: H04L49/9057 , H04L49/9047
摘要: The packet processing apparatus includes a packet memory, a transmission processing unit that writes a plurality of packets to be transmitted to the packet memory to generate a combination packet into which the plurality of packets have been concatenated, a line handling unit that sends packets to a communication line, and a combination packet transfer unit that DMA-transfers the combination packet from the packet memory to the line handling unit. The transmission processing unit writes information on an address in the packet memory of beginning data of an individual packet in the combination packet to a descriptor. The line handling unit separates the DMA-transferred combination packet into a plurality of packets and sends the plurality of packets to the communication line.
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公开(公告)号:US11882061B2
公开(公告)日:2024-01-23
申请号:US17619189
申请日:2019-06-24
发明人: Shoko Oteru , Shuhei Yoshida , Yuta Ukon , Namiko Ikeda , Koyo Nitta
IPC分类号: H04L49/9057 , H04L1/1607 , H04L47/28 , H04L47/34 , H04L49/55
CPC分类号: H04L49/9057 , H04L1/1621 , H04L47/28 , H04L47/34 , H04L49/557
摘要: A data sequence correction method for temporarily saving data with sequence information in a ring buffer and performing sequence correction is provided. The ring buffer includes a number of storage regions, a monitoring section having one or more continuous sequence numbers, and an acceptance section having a first or second sequence number of the monitoring section as a start sequence number and a sequence number immediately preceding the start sequence number of the monitoring section as an end sequence number. The method includes, when a value determined based on a remainder obtained by dividing a sequence number of received data by the number of storage regions is inside the acceptance section, writing the received data in a position of the storage region corresponding to the determined value, and when data are written in the entire monitoring section, reading out all the data in the monitoring section.
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公开(公告)号:US20230188439A1
公开(公告)日:2023-06-15
申请号:US17925230
申请日:2020-05-26
发明人: Hiroyuki Uzawa , Shuhei Yoshida , Namiko Ikeda , Koyo Nitta
IPC分类号: H04L43/062 , H04L43/028 , H04L43/026
CPC分类号: H04L43/062 , H04L43/028 , H04L43/026
摘要: A traffic monitoring apparatus that monitors traffic of a monitoring target network and includes a statistical information processor that acquires statistical information per specific flow of the traffic, and a packet capture unit that captures a packet of the specific flow, in which the statistical information processor includes a statistical information aggregation unit that aggregates the pieces of statistical information, and a statistical information file generation unit that generates a statistical information file based on the pieces of aggregated statistical information.
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公开(公告)号:US11374874B2
公开(公告)日:2022-06-28
申请号:US17290342
申请日:2019-10-23
发明人: Yuta Ukon , Shuhei Yoshida , Koyo Nitta
IPC分类号: H04L47/80 , H04L47/6275
摘要: An access control unit includes packet buffers provided for each of users, a packet identification unit that stores received packets in a corresponding packet buffer, a scheduling unit that decides a packet buffer to be the object of transfer, a transfer control unit that, in a case that updating of reference data can be performed at an application processing circuit, and also the packet buffer decided by the scheduling unit is different from the current packet buffer that is the object of transfer, updates to reference data corresponding to the packet buffer decided by the scheduling unit, and a buffer selection unit that connects the packet buffers decided to be the object of transfer to the packet transfer unit when updating of reference data is completed.
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公开(公告)号:US20210409344A1
公开(公告)日:2021-12-30
申请号:US17290342
申请日:2019-10-23
发明人: Yuta Ukon , Shuhei Yoshida , Koyo Nitta
IPC分类号: H04L12/927 , H04L12/865
摘要: An access control unit includes packet buffers provided for each of users, a packet identification unit that stores received packets in a corresponding packet buffer, a scheduling unit that decides a packet buffer to be the object of transfer, a transfer control unit that, in a case that updating of reference data can be performed at an application processing circuit, and also the packet buffer decided by the scheduling unit is different from the current packet buffer that is the object of transfer, updates to reference data corresponding to the packet buffer decided by the scheduling unit, and a buffer selection unit that connects the packet buffers decided to be the object of transfer to the packet transfer unit when updating of reference data is completed.
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公开(公告)号:US12126509B2
公开(公告)日:2024-10-22
申请号:US18256411
申请日:2020-12-09
发明人: Hiroyuki Uzawa , Saki Hatta , Shuhei Yoshida , Koyo Nitta
IPC分类号: H04L43/106 , H04L43/067 , H04L69/28
CPC分类号: H04L43/067 , H04L43/106 , H04L69/28
摘要: An embodiment is a packet capture device including a first local timer synchronized with an external global timer, a second local timer, a time stamp assign unit for assigning a time stamp to a inputted packet signal based on the second local timer, a filter unit for selecting the packet signal to which the time stamp is assigned, a capture file generation unit for receiving the selected packet signal, and a storage unit for storing a capture file generated in the capture file generation unit, wherein the capture file generation unit calculate a difference between a timer value of the first local timer and a timer value of the second local timer to correct the time stamp value on the basis of the difference.
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公开(公告)号:US12026113B2
公开(公告)日:2024-07-02
申请号:US17436977
申请日:2020-04-07
发明人: Tomoaki Kawamura , Shoko Oteru , Yuta Ukon , Shuhei Yoshida
CPC分类号: G06F13/28 , G06F12/06 , G06F13/4022
摘要: A packet processing apparatus includes a packet processor that performs processing on a packet received from a communication line and outputs data that is a result of the processing, a data combiner that concatenates a plurality of pieces of data output from the packet processor to generate a data block, and a combination data transferor that DMA-transfers the data block generated by the data combiner to a data memory. The combination data transferor writes information on an address in the data memory of a beginning of an individual piece of data in the data block to a descriptor that is a data area on a predetermined memory.
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公开(公告)号:US11831524B2
公开(公告)日:2023-11-28
申请号:US17773807
申请日:2019-11-05
发明人: Yuta Ukon , Shuhei Yoshida , Shoko Oteru , Namiko Ikeda , Koyo Nitta
IPC分类号: H04L43/08 , H04L43/062 , H04L43/10 , H04L69/22
CPC分类号: H04L43/062 , H04L43/08 , H04L43/10 , H04L69/22
摘要: A state detection circuit compares a target connection with an immediate previous connection based on an identifier of an incoming packet and detects a post-transitional state of the target connection based on a control flag of the incoming packet and on a pre-transitional state of the target connection detected just before if the target connection is identical with the immediate previous connection; and a connection counting circuit increments or decrements the number of target connections only when the detected post-transitional state indicates a start or end of the target connection.
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公开(公告)号:US20220407788A1
公开(公告)日:2022-12-22
申请号:US17773807
申请日:2019-11-05
发明人: Yuta Ukon , Shuhei Yoshida , Shoko Oteru , Namiko Ikeda , Koyo Nitta
IPC分类号: H04L43/062 , H04L69/22 , H04L43/08 , H04L43/10
摘要: A state detection circuit compares a target connection with an immediate previous connection based on an identifier of an incoming packet and detects a post-transitional state of the target connection based on a control flag of the incoming packet and on a pre-transitional state of the target connection detected just before if the target connection is identical with the immediate previous connection; and a connection counting circuit increments or decrements the number of target connections only when the detected post-transitional state indicates a start or end of the target connection.
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