公开(公告)号：US06191494B1

公开(公告)日：2001-02-20

申请号：US09342500

申请日：1999-06-29

申请人： Nobuo Ooyama ,  Shinichiro Maki ,  Fumitoshi Fujisaki ,  Syunichi Kuramoto ,  Yukio Saigo ,  Yasuo Yatsuda ,  Youichi Matae ,  Atsushi Yano ,  Kazuto Tsuji ,  Masafumi Tetaka

发明人： Nobuo Ooyama ,  Shinichiro Maki ,  Fumitoshi Fujisaki ,  Syunichi Kuramoto ,  Yukio Saigo ,  Yasuo Yatsuda ,  Youichi Matae ,  Atsushi Yano ,  Kazuto Tsuji ,  Masafumi Tetaka

IPC分类号： H01L2328

CPC分类号： H01L21/568 ,  H01L23/3107 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83001 ,  H01L2224/85001 ,  H01L2224/85399 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H05K3/20 ,  H05K3/4007 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A semiconductor device and a method of producing the same are provided. The semiconductor device includes: a semiconductor chip; a resin package which seals the semiconductor chip; signal passages which guide the signal terminals of the semiconductor chip outward from the resin package; a grounding metal film in contact with the bottom surface of the semiconductor chip; and a grounding passage which is connected to the grounding metal film and guided outward from the resin package.

摘要翻译： 提供半导体器件及其制造方法。 半导体器件包括：半导体芯片; 密封半导体芯片的树脂封装; 信号通道，其将半导体芯片的信号端子从树脂封装向外引导; 与半导体芯片的底面接触的接地金属膜; 以及连接到接地金属膜并从树脂封装向外引导的接地通道。

公开(公告)号：US06392433B1

公开(公告)日：2002-05-21

申请号：US09350925

申请日：1999-07-12

申请人： Kenji Itasaka ,  Terumi Kamifukumoto ,  Yuji Akasaki ,  Nobuo Ooyama

发明人： Kenji Itasaka ,  Terumi Kamifukumoto ,  Yuji Akasaki ,  Nobuo Ooyama

IPC分类号： G01R3126

摘要： A method of testing semiconductor devices includes an adhering step, a position correcting step, and an electrical test step. The adhering step includes adhering either a semiconductor device collective body or a plurality of individual semiconductor devices onto an adhesive tape provided on a tape-holding member, the semiconductor device collective body being constructed by a plurality of semiconductor devices integrated together. The position correcting step includes positioning the semiconductor devices by mounting the tape-holding member on a position correction unit and, using an image processing technique, implementing position recognition and position correction of the semiconductor devices adhered on the adhesive tape. The electrical test step includes implementing an electrical characteristic test on the semiconductor devices positioned in the position correction step by connected the semiconductor devices on a testing contactor.