公开(公告)号：US06257965B1

公开(公告)日：2001-07-10

申请号：US09471809

申请日：1999-12-23

申请人： Noritaka Kamikubo ,  Yuji Satoh

发明人： Noritaka Kamikubo ,  Yuji Satoh

IPC分类号： B24B719

CPC分类号： B24B37/04 ,  B24B57/02

摘要： A polishing liquid supply apparatus for supplying a polishing liquid to a chemical mechanical polishing apparatus includes a polishing liquid supply system including a polishing liquid tank for storing the polishing liquid; and a polishing liquid supply path for supplying the polishing liquid from the polishing liquid tank to the chemical mechanical polishing apparatus. The polishing liquid supply system is structured so as to shield the polishing liquid therein from external air.

摘要翻译： 一种用于向化学机械抛光装置供应抛光液的抛光液体供给装置包括：研磨液供给系统，包括：用于储存抛光液的抛光液罐; 以及用于将抛光液从抛光液罐供给到化学机械抛光装置的抛光液供给路径。 抛光液供给系统构成为将外部空气中的研磨液遮蔽。

公开(公告)号：US20100035438A1

公开(公告)日：2010-02-11

申请号：US12462249

申请日：2009-07-30

申请人： Noritaka Kamikubo ,  Hiroshi Yamauchi

发明人： Noritaka Kamikubo ,  Hiroshi Yamauchi

IPC分类号： H01L21/3105 ,  B24B49/04 ,  B24B7/22

CPC分类号： H01L21/31053

摘要： An interlayer insulating film is formed on a semiconductor substrate having a semiconductor element formed thereon. At this time, there are protrusions higher than surroundings thereof and non-protruding portions lower than the protrusions on the surface of the interlayer insulating film. First, a first polishing process is carried out on the surface of the interlayer insulating film with use of a first abrasive having non-Prestonian properties produced by mixing abrasive materials including abrasive grains, a polymer additive and water at a predetermined first mixture ratio. Then, after the first abrasive process shifts to an automatically stopping state, a second polishing process is carried out on the surface of the interlayer insulating film with use of a second abrasive having the concentration of polymer additive lower than that of the first abrasive and produced by mixing the abrasive materials at a second mixture ratio different from the first mixture ratio.

摘要翻译： 在其上形成有半导体元件的半导体衬底上形成层间绝缘膜。 此时，具有高于其周围的突出部和比层间绝缘膜的表面上的突起低的非突出部。 首先，使用通过以预定的第一混合比混合包括磨料颗粒，聚合物添加剂和水的研磨材料而产生的非Prestonian性质的第一研磨剂，在层间绝缘膜的表面上进行第一抛光工艺。 然后，在第一研磨过程转变到自动停止状态之后，使用聚合物添加剂的浓度低于第一磨料的浓度的第二研磨剂在层间绝缘膜的表面上进行第二抛光处理， 通过以与第一混合比不同的第二混合比混合研磨材料。

公开(公告)号：US06794267B2

公开(公告)日：2004-09-21

申请号：US10062543

申请日：2002-02-05

申请人： Noritaka Kamikubo

发明人： Noritaka Kamikubo

IPC分类号： H01L214763

CPC分类号： H01L21/31053 ,  H01L21/76819

摘要： A process of manufacturing a semiconductor device comprising the step of chemical mechanical polishing for flattening an interlayer insulating film deposited on a wafer on which desired elements are in advance formed, wherein a stopper layer is formed on a region which will be excessively polished through the chemical mechanical polishing before or after forming the interlayer insulating film.

摘要翻译： 一种制造半导体器件的方法，包括：化学机械抛光步骤，用于使沉积在预先形成所需元素的晶片上的层间绝缘膜平坦化，其中在通过化学品将被过度抛光的区域上形成阻挡层 在形成层间绝缘膜之前或之后的机械抛光。

公开(公告)号：US08222144B2

公开(公告)日：2012-07-17

申请号：US12462249

申请日：2009-07-30

申请人： Noritaka Kamikubo ,  Hiroshi Yamauchi

发明人： Noritaka Kamikubo ,  Hiroshi Yamauchi

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/31053

摘要： An interlayer insulating film is formed on a semiconductor substrate having a semiconductor element formed thereon. At this time, there are protrusions higher than surroundings thereof and non-protruding portions lower than the protrusions on the surface of the interlayer insulating film. First, a first polishing process is carried out on the surface of the interlayer insulating film with use of a first abrasive having non-Prestonian properties produced by mixing abrasive materials including abrasive grains, a polymer additive and water at a predetermined first mixture ratio. Then, after the first abrasive process shifts to an automatically stopping state, a second polishing process is carried out on the surface of the interlayer insulating film with use of a second abrasive having the concentration of polymer additive lower than that of the first abrasive and produced by mixing the abrasive materials at a second mixture ratio different from the first mixture ratio.

摘要翻译： 在其上形成有半导体元件的半导体衬底上形成层间绝缘膜。 此时，具有高于其周围的突出部和比层间绝缘膜的表面上的突起低的非突出部。 首先，使用通过以预定的第一混合比混合包括磨料颗粒，聚合物添加剂和水的研磨材料而产生的非Prestonian性质的第一研磨剂，在层间绝缘膜的表面上进行第一抛光工艺。 然后，在第一研磨过程转变到自动停止状态之后，使用聚合物添加剂的浓度低于第一研磨剂的第二研磨剂，在层间绝缘膜的表面上进行第二研磨处理，并产生 通过以与第一混合比不同的第二混合比混合研磨材料。

公开(公告)号：US20110114951A1

公开(公告)日：2011-05-19

申请号：US12994377

申请日：2009-05-11

申请人： Noritaka Kamikubo

发明人： Noritaka Kamikubo

IPC分类号： H01L23/544 ,  H01L21/66

CPC分类号： G01B11/06 ,  G01N21/47 ,  G01N21/9501 ,  G01N21/9505 ,  G01N21/95607 ,  G03F7/70616 ,  H01L22/12 ,  H01L23/544 ,  H01L2223/5448 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a semiconductor device fabrication method that comprises a fabrication process, wherein device structural patients are formed in a device formation area inside a chip formation area and wherein inspection patterns are formed in multiple inspection areas inside the aforementioned chip formation area, on the film-side of a semiconductor wafer that has a film for pattern formation, and an inspection process. The aforementioned inspection patterns have a repeating pattern with identical lines and identical spaces formed in a first inspection area among the aforementioned multiple inspection areas, and a uniform pattern without spaces formed in a second inspection area among the multiple inspection areas. The aforementioned inspection process has at least a pattern inspection process that comprises a first inspection, which uses an optical measurement method capable of measuring three-dimensional pattern shapes to measure the parameters of the repeating pattern in the aforementioned first inspection area in the direction of repetition in which the lines and spaces are repeated, and a second inspection, which uses an optical measurement method capable of measuring film thickness to measure the thickness of the uniform pattern in the aforementioned second inspection area.

摘要翻译： 公开了一种半导体器件制造方法，其包括制造工艺，其中器件结构患者形成在芯片形成区域内的器件形成区域中，并且其中检查图案形成在上述芯片形成区域内部的多个检查区域中， 具有用于图案形成的膜的半导体晶片的侧面和检查过程。 上述检查图案具有在上述多个检查区域中的第一检查区域中形成的具有相同线和相同空间的重复图案，以及在多个检查区域中形成在第二检查区域中的没有空间的均匀图案。 上述检查处理至少具有图案检查处理，该图案检查处理包括第一检查，其使用能够测量三维图案形状的光学测量方法来测量在重复方向上的上述第一检查区域中的重复图案的参数 其中重复行和间隔，以及第二检查，其使用能够测量膜厚度的光学测量方法来测量上述第二检查区域中的均匀图案的厚度。

公开(公告)号：US08426857B2

公开(公告)日：2013-04-23

申请号：US12994377

申请日：2009-05-11

申请人： Noritaka Kamikubo

发明人： Noritaka Kamikubo

IPC分类号： H01L21/66

CPC分类号： G01B11/06 ,  G01N21/47 ,  G01N21/9501 ,  G01N21/9505 ,  G01N21/95607 ,  G03F7/70616 ,  H01L22/12 ,  H01L23/544 ,  H01L2223/5448 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for producing a semiconductor device comprising a process step of forming a device configuration pattern in a device formation region in a chip formation region on a film side of a semiconductor wafer having the film for forming a pattern, and forming inspection patterns in a plurality of inspection regions in the chip formation region, and an inspection step, wherein the inspection patterns have a repeat pattern and a uniform pattern formed in a first inspection region in the plurality of inspection regions, the inspection step has at least a pattern inspection step including a first inspection to measure a parameter of the repeat pattern, by using an optical measurement method capable of measuring a three-dimensional pattern shape, and a second inspection to measure a film thickness of the uniform pattern by using an optical measurement method capable of measuring the film thickness.

摘要翻译： 一种半导体器件的制造方法，其特征在于，包括在具有形成图案的膜的半导体晶片的膜侧的芯片形成区域的器件形成区域中形成器件配置图形的工序，以及形成多个检测图案的工序 以及检查步骤，其中检查图案具有形成在多个检查区域中的第一检查区域中的重复图案和均匀图案，检查步骤至少具有图案检查步骤，包括： 通过使用能够测量三维图案形状的光学测量方法来测量重复图案的参数的第一次检查，以及通过使用能够测量的光学测量方法来测量均匀图案的膜厚度的第二检查 膜厚度。

公开(公告)号：US20090045519A1

公开(公告)日：2009-02-19

申请号：US11887946

申请日：2006-03-09

申请人： Noritaka Kamikubo

发明人： Noritaka Kamikubo

IPC分类号： H01L21/768 ,  H01L23/482

CPC分类号： H01L21/76834 ,  H01L21/7684 ,  H01L21/76883

摘要： In one embodiment of the present invention, a process is disclosed for producing a semiconductor device that can suppress the diffusion of an electrically conductive metal into an insulating film. The process for producing a semiconductor device is characterized by including the steps of (1) forming a groove in an insulating film provided on a semiconductor substrate, (2) forming a barrier film on the inner face of the groove and on the insulating film, (3) forming an electrically conductive metal layer on the barrier film so as to fill the groove, (4) removing the electrically conductive metal layer and barrier film on the insulating film and a part of the electrically conductive metal layer within the groove so that the surface of the electrically conductive metal layer is lower than the surface of the insulating film, (5) forming a metal diffusion preventive film on the insulating film and the electrically conductive metal layer, and (6) removing the metal diffusion preventive film on the insulating film and a part of the insulating film so that at least a part of the metal diffusion preventive film on the electrically conductive metal layer remains unremoved.

摘要翻译： 在本发明的一个实施例中，公开了一种用于制造可以抑制导电金属扩散到绝缘膜中的半导体器件的方法。 制造半导体器件的工艺的特征在于包括以下步骤：（1）在设置在半导体衬底上的绝缘膜中形成沟槽，（2）在槽的内表面和绝缘膜上形成阻挡膜， （3）在阻挡膜上形成导电金属层以填充凹槽，（4）去除绝缘膜上的导电金属层和阻挡膜以及沟槽内的导电金属层的一部分，使得 导电金属层的表面低于绝缘膜的表面，（5）在绝缘膜和导电金属层上形成金属防扩散膜，（6）除去金属扩散防止膜 绝缘膜和绝缘膜的一部分，使得导电金属层上的金属防扩散膜的至少一部分保持不被去除。