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公开(公告)号:US20190206779A1
公开(公告)日:2019-07-04
申请号:US16330007
申请日:2017-08-31
申请人: OCTAVO SYSTEMS LLC
IPC分类号: H01L23/498 , H01L23/48 , H01L23/495 , H01L23/31 , H01L23/00 , H01L25/16 , H05K1/11 , H05K1/18
CPC分类号: H01L23/49833 , H01L23/3107 , H01L23/481 , H01L23/49513 , H01L23/49838 , H01L23/5385 , H01L23/5386 , H01L24/14 , H01L24/49 , H01L25/0655 , H01L25/16 , H01L2224/04042 , H01L2224/48157 , H01L2224/48227 , H01L2224/73265 , H01L2924/14 , H01L2924/1436 , H01L2924/14511 , H01L2924/15192 , H01L2924/15311 , H01L2924/19042 , H01L2924/19105 , H01L2924/19107 , H05K1/111 , H05K1/181
摘要: A substrate for a SIP is that has a portion of its top surface covered with spaced apart electrically conductive landing pads for electrical connection to components located on the surface and the landing pads serve as interconnection pads for making electrical connections between at least a portion of said pads when interconnected by a segment of bond wire to form at least a portion of the SIP. Methods for use of the universal substrate in SIP system design and manufacture of a SIP.
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公开(公告)号:US20210072958A1
公开(公告)日:2021-03-11
申请号:US16975013
申请日:2019-02-22
申请人: Octavo Systems LLC
摘要: The present disclosure describes a mixed signal arithmetic logic unit configured to use a combination of analog processing elements and digital processing elements in a cohesive manner. Depending on the signals and the data received for processing, the analog processing elements and digital processing elements may be used separately, independently or in combination to optimize computational results and the performance of the mixed signal arithmetic logic unit.
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