Image sensor diagonal isolation structures

    公开(公告)号:US12289927B2

    公开(公告)日:2025-04-29

    申请号:US17705133

    申请日:2022-03-25

    Abstract: Image sensors, isolation structures, and techniques of fabrication are provided. An image sensor includes a source of electromagnetic radiation disposed on a substrate, a pixel array disposed on the substrate and thermally coupled with source of electromagnetic radiation, and an isolation structure disposed on the substrate between the source of electromagnetic radiation and the pixel array. The isolation structure can define a first reflective surface oriented on a first bias relative to a lateral axis of the pixel array and a second reflective surface oriented on a second bias relative to the lateral axis. The isolation structure can be configured to attenuate residual electromagnetic radiation reaching a proximal region of the pixel array by pairing a first reflection and a second reflection of the electromagnetic radiation by the first reflective surface and the second reflective surface.

    Passivation-enhanced image sensor and surface-passivation method

    公开(公告)号:US12176364B2

    公开(公告)日:2024-12-24

    申请号:US17562577

    申请日:2021-12-27

    Abstract: An image sensor includes a semiconductor substrate and a multilayer film. The semiconductor substrate includes a photodiode and a back surface having a recessed region that surrounds the photodiode. The multilayer film is on, and conformal to, the recessed region, and includes N layer-groups of adjacent high-κ material layers. Each pair of adjacent high-κ material layers of a same layer-group of the N layer-groups includes (i) an outer-layer having an outer fixed-charge density and (ii) an inner-layer, located between the outer-layer and the recessed region, that has an inner fixed-charge density. Each of the outer and inner fixed-charge density is negative. The inner fixed-charge density is more negative than the outer fixed-charge density.

    IMAGE SENSOR DIAGONAL ISOLATION STRUCTURES
    3.
    发明公开

    公开(公告)号:US20230307478A1

    公开(公告)日:2023-09-28

    申请号:US17705133

    申请日:2022-03-25

    CPC classification number: H01L27/1463 H01L27/14629

    Abstract: Image sensors, isolation structures, and techniques of fabrication are provided. An image sensor includes a source of electromagnetic radiation disposed on a substrate, a pixel array disposed on the substrate and thermally coupled with source of electromagnetic radiation, and an isolation structure disposed on the substrate between the source of electromagnetic radiation and the pixel array. The isolation structure can define a first reflective surface oriented on a first bias relative to a lateral axis of the pixel array and a second reflective surface oriented on a second bias relative to the lateral axis. The isolation structure can be configured to attenuate residual electromagnetic radiation reaching a proximal region of the pixel array by pairing a first reflection and a second reflection of the electromagnetic radiation by the first reflective surface and the second reflective surface.

    Metal routing in image sensor using hybrid bonding

    公开(公告)号:US11233088B2

    公开(公告)日:2022-01-25

    申请号:US16900722

    申请日:2020-06-12

    Abstract: A method of routing electrical connections in a wafer-on-wafer structure comprises, bonding a metal bonding pad of a first wafer to a metal bonding pad of a second wafer; bonding first wafer to the second wafer with a material different from the metal bonding pads; forming metal interconnect structures connecting the metal bonding pad of the first wafer to a first device disposed within a first and second side of the first wafer; and forming metal interconnect structures connecting the metal bonding pad of the second wafer to a second and third devices disposed within the second wafer, to connect the first device to the second and third devices through the metal bonding pads, wherein the electrical connections of the devices between the first and second wafers do not have a through-via that passes completely through the first or the second wafer.

    METAL ROUTING IN IMAGE SENSOR USING HYBRID BONDING

    公开(公告)号:US20210391376A1

    公开(公告)日:2021-12-16

    申请号:US16900722

    申请日:2020-06-12

    Abstract: A method of routing electrical connections in a wafer-on-wafer structure comprises, bonding a metal bonding pad of a first wafer to a metal bonding pad of a second wafer; bonding first wafer to the second wafer with a material different from the metal bonding pads; forming metal interconnect structures connecting the metal bonding pad of the first wafer to a first device disposed within a first and second side of the first wafer; and forming metal interconnect structures connecting the metal bonding pad of the second wafer to a second and third devices disposed within the second wafer, to connect the first device to the second and third devices through the metal bonding pads, wherein the electrical connections of the devices between the first and second wafers do not have a through-via that passes completely through the first or the second wafer.

    Metal vertical transfer gate with high-k dielectric passivation lining

    公开(公告)号:US11121169B2

    公开(公告)日:2021-09-14

    申请号:US16452272

    申请日:2019-06-25

    Abstract: A method for manufacturing an image sensor includes, for each of a plurality of photosensitive pixels of the image sensor, forming a trench in a semiconductor substrate of the image sensor, and depositing temporary transfer gate material in and above the trench. The method further includes, after the step of depositing temporary transfer gate material, high-temperature annealing at least a portion of the semiconductor substrate. In addition, the method includes, after the step of high-temperature annealing, (a) removing the temporary transfer gate material, thereby reopening the trench, (b) depositing a passivation lining, having a high-k dielectric, in the reopened trench, and (c) depositing metal on the high-k dielectric passivation lining to form a metal vertical transfer gate in the trench and extending above the trench.

    Pixel cell having anti-blooming structure and image sensor

    公开(公告)号:US12262563B2

    公开(公告)日:2025-03-25

    申请号:US17701632

    申请日:2022-03-22

    Abstract: A pixel cell is formed on a semiconductor substrate having a front surface. The pixel cell includes a photodiode, a floating diffusion region, and a transfer gate. The photodiode is disposed in the semiconductor substrate. The floating diffusion region includes a first doped region disposed in the semiconductor substrate, wherein the first doped region extends from the front surface to a first junction depth in the semiconductor substrate. The transfer gate is configured to selectively couple the photodiode to the floating diffusion region controlling charge transfer between the photodiode and the floating diffusion region. The transfer gate includes a planar gate disposed on the front surface of the semiconductor substrate and a pair of vertical gate electrodes. Each vertical gate electrode extending a gate depth from the planar gate into the semiconductor substrate. The first junction depth is greater than the gate depth.

    Pixel Cell Having Anti-Blooming Structure and Image Sensor

    公开(公告)号:US20230307484A1

    公开(公告)日:2023-09-28

    申请号:US17701632

    申请日:2022-03-22

    CPC classification number: H01L27/14656

    Abstract: A pixel cell is formed on a semiconductor substrate having a front surface. The pixel cell includes a photodiode, a floating diffusion region, and a transfer gate. The photodiode is disposed in the semiconductor substrate. The floating diffusion region includes a first doped region disposed in the semiconductor substrate, wherein the first doped region extends from the front surface to a first junction depth in the semiconductor substrate. The transfer gate is configured to selectively couple the photodiode to the floating diffusion region controlling charge transfer between the photodiode and the floating diffusion region. The transfer gate includes a planar gate disposed on the front surface of the semiconductor substrate and a pair of vertical gate electrodes. Each vertical gate electrode extending a gate depth from the planar gate into the semiconductor substrate. The first junction depth is greater than the gate depth.

    Semiconductor substrate with passivated full deep-trench isolation and associated methods of manufacture

    公开(公告)号:US11670662B2

    公开(公告)日:2023-06-06

    申请号:US17133553

    申请日:2020-12-23

    CPC classification number: H01L27/1463 H01L27/1462 H01L27/14645 H01L27/14685

    Abstract: An image sensor with passivated full deep-trench isolation includes a semiconductor substrate, the substrate including a plurality of sidewalls that form a plurality of trenches that separates pixels of a pixel array, and a passivation layer lining the plurality of sidewall surfaces and the back surface of the semiconductor substrate. A method for forming an image sensor with passivated full deep-trench isolation includes forming trenches in a semiconductor substrate, filling the trenches with a sacrificial material, forming a plurality of photodiode regions, forming a circuit layer, thinning the semiconductor substrate, and removing the sacrificial material. A method for reducing noise in an image sensor includes removing material from a semiconductor substrate to form a plurality of trenches that extend from a front surface toward a back surface, and depositing a dielectric material onto the back surface and into the plurality of trenches through a back opening of each trench.

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