Image sensor diagonal isolation structures

    公开(公告)号:US12289927B2

    公开(公告)日:2025-04-29

    申请号:US17705133

    申请日:2022-03-25

    Abstract: Image sensors, isolation structures, and techniques of fabrication are provided. An image sensor includes a source of electromagnetic radiation disposed on a substrate, a pixel array disposed on the substrate and thermally coupled with source of electromagnetic radiation, and an isolation structure disposed on the substrate between the source of electromagnetic radiation and the pixel array. The isolation structure can define a first reflective surface oriented on a first bias relative to a lateral axis of the pixel array and a second reflective surface oriented on a second bias relative to the lateral axis. The isolation structure can be configured to attenuate residual electromagnetic radiation reaching a proximal region of the pixel array by pairing a first reflection and a second reflection of the electromagnetic radiation by the first reflective surface and the second reflective surface.

    Optimized pixel design for mitigating MIM image lag

    公开(公告)号:US12137296B1

    公开(公告)日:2024-11-05

    申请号:US18298975

    申请日:2023-04-11

    Abstract: A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A transfer transistor is coupled between the photodiode and a floating diffusion to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a pixel voltage source and the floating diffusion. A lateral overflow integration capacitor (LOFIC) network includes a first LOFIC coupled between the floating diffusion and the first bias voltage source, and a second LOFIC coupled between the floating diffusion and the second bias voltage source. The first LOFIC is configured to be forward biased and the second LOFIC is configured to be reverse biased at an end of an integration period, and image charge discharged from the first LOFIC and image charge discharged from the second LOFIC compensate each other during a readout period.

    Flicker-mitigating pixel-array substrate

    公开(公告)号:US11710752B2

    公开(公告)日:2023-07-25

    申请号:US17118252

    申请日:2020-12-10

    Abstract: A flicker-mitigating pixel-array substrate includes a semiconductor substrate and a metal annulus. The semiconductor substrate includes a small-photodiode region. A back surface of the semiconductor substrate forms a trench surrounding the small-photodiode region in a cross-sectional plane parallel to a back-surface region of the back surface above the small-photodiode region. The metal annulus (i) at least partially fills the trench, (ii) surrounds the small-photodiode region in the cross-sectional plane, and (iii) extends above the back surface. A method for fabricating a flicker-mitigating pixel-array substrate includes forming a metal layer (i) in a trench that surrounds the small-photodiode region in a cross-sectional plane parallel to a back-surface region of the back surface above the small-photodiode region and (ii) on the back-surface region. The method also includes decreasing a thickness of an above-diode section of the metal layer located above the back-surface region.

    HIGH DYNAMIC RANGE SPLIT PIXEL CMOS IMAGE SENSOR WITH LOW COLOR CROSSTALK

    公开(公告)号:US20210358993A1

    公开(公告)日:2021-11-18

    申请号:US16877077

    申请日:2020-05-18

    Abstract: A pixel cell includes a plurality of subpixels to generate image charge in response to incident light. The subpixels include an inner subpixel laterally surrounded by outer subpixels. A first plurality of transfer gates disposed proximate to the inner subpixel and a first grouping of outer subpixels. A first floating diffusion is coupled to receive the image charge from the first grouping of outer subpixels through a first plurality of transfer gates. A second plurality of transfer gates disposed proximate to the inner subpixel and the second grouping of outer subpixels. A second floating diffusion disposed in the semiconductor material and coupled to receive the image charge from each one of the second grouping of outer subpixels through the second plurality of transfer gates. The image charge in the inner subpixel is received by the first, second, or both floating diffusions through respective transfer gates.

    TRANSISTORS HAVING INCREASED EFFECTIVE CHANNEL WIDTH

    公开(公告)号:US20210305298A1

    公开(公告)日:2021-09-30

    申请号:US16830078

    申请日:2020-03-25

    Abstract: Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. At least three substrate trench structures are formed in the semiconductor substrate, defining two nonplanar structures, each having a plurality of sidewall portions. An isolation layer includes at least three isolation layer trench structures, each being disposed in a respective one of the three substrate trench structures. A gate includes three fingers, each being disposed in a respective one of the three isolation layer trench structures. An electron channel of the transistor extends along the plurality of sidewall portions of the two nonplanar structures in a channel width plane.

    METHOD AND STRUCTURE TO IMPROVE IMAGE SENSOR CROSSTALK

    公开(公告)号:US20210202546A1

    公开(公告)日:2021-07-01

    申请号:US16729176

    申请日:2019-12-27

    Abstract: Image sensors include a substrate material having a plurality of small photodiodes (SPDs) and a plurality of large photodiodes (LPDs) disposed therein. A plurality of pixel isolators is formed in the substrate material, each pixel isolator being disposed between one of the SPDs and one of the LPDs. A passivation layer is disposed on the substrate material and a buffer layer is disposed on the passivation layer. A plurality of first metal elements is disposed in the buffer layer, each first metal element being disposed over one of the pixel isolators, and a plurality of second metal elements is disposed over the plurality of first metal elements.

    Pillar structures for suppressing optical cross-talk

    公开(公告)号:US10811453B1

    公开(公告)日:2020-10-20

    申请号:US16671608

    申请日:2019-11-01

    Abstract: An image sensor includes a plurality of photodiodes arranged in rows and columns of a pixel array that is disposed in a semiconductor substrate. Individual photodiodes of the pixel array are configured to receive incoming light through a backside of the semiconductor substrate. A front side of the semiconductor substrate is opposite from the backside. A plurality of deep trench isolation (DTI) structures are formed laterally with respect to the photodiodes on the backside of the semiconductor substrate. The plurality of DTI structures are arranged between adjacent photodiodes. A plurality of pillar structures extend from a metal grid proximate to the backside and is formed proximate to the backside and aligned with the DTI structures.

    IMAGE SENSOR WITH OPTICAL STRUCTURE FOR FLARE REDUCTION

    公开(公告)号:US20250081656A1

    公开(公告)日:2025-03-06

    申请号:US18461320

    申请日:2023-09-05

    Abstract: An image sensor is described. The image sensor comprises a plurality of pixels arranged to form an active pixel array, a plurality of contact pads disposed within a peripheral region of the image sensor that surrounds the active pixel array, and an optical structure disposed within the peripheral region between the plurality of contact pads and the active pixel array. The optical structure is adapted to mitigate stray light from reaching the active pixel array.

    Transistors having increased effective channel width

    公开(公告)号:US11616088B2

    公开(公告)日:2023-03-28

    申请号:US16830086

    申请日:2020-03-25

    Abstract: Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. The transistor includes a nonplanar structure disposed in the semiconductor substrate, which is bounded by two outer trench structures formed in the semiconductor substrate. Isolation deposits are disposed within the two outer trench structures formed in the semiconductor substrate. A gate includes a planar gate and two fingers extending into one of two inner trench structures formed in the semiconductor substrate between the nonplanar structure and a respective one of the two outer trench structures. This structure creates an electron channel extending along a plurality of sidewall portions of the nonplanar structure in a channel width plane.

Patent Agency Ranking