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公开(公告)号:US10784408B2
公开(公告)日:2020-09-22
申请号:US16092507
申请日:2017-04-10
Applicant: OSRAM OLED GmbH
Inventor: Lutz Höppel
Abstract: An optoelectronic semiconductor chip includes a semiconductor body including a first semiconductor region, a second semiconductor region and an active zone disposed between the first and second semiconductor regions, an electrically conductive contact layer arranged on a side of the first semiconductor region facing away from the second semiconductor region, and an electrically conductive mirror layer arranged between the first semiconductor region and the electrically conductive contact layer, and laterally protruding at the edge by the first semiconductor region and the electrically conductive contact layer so that between the first semiconductor region and the electrically conductive contact layer there is an interspace in which a protective layer is arranged for protecting the mirror layer, wherein the electrically conductive contact layer extends laterally to an edge of the first semiconductor region, and the electrically conductive contact layer consists of Ni.
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公开(公告)号:US10665758B2
公开(公告)日:2020-05-26
申请号:US15747188
申请日:2016-07-14
Applicant: OSRAM OLED GmbH
Inventor: Christian Leirer , Thomas Schwarz , Lutz Höppel
Abstract: A component having a metal carrier and a method for producing a component are disclosed. In an embodiment the component includes a carrier having a metallic carrier layer, an insulating layer and a first through-contact extending in a vertical direction throughout the carrier layer, wherein the through-contact is electrically isolated from the carrier layer via the insulating layer. The component further includes a semiconductor body and a wiring structure arranged in the vertical direction between the carrier and the semiconductor body at least places and electrically contacting the semiconductor body, wherein the wiring structure has a first connection area and a second connection area, wherein the connection areas adjoin the carrier and are assigned to different electrical polarities of the component, wherein the first through-contact is in electrical contact with one of the connection areas, and wherein the component is configured to be externally electrically connectable via the carrier.
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公开(公告)号:US20200350207A1
公开(公告)日:2020-11-05
申请号:US16758659
申请日:2018-10-25
Applicant: OSRAM OLED GmbH
Inventor: Thomas Schwarz , Lutz Höppel , Thorsten Frank Baumheinrich , Jens Richter
Abstract: The method of manufacturing a plurality of semiconductor chips (100) comprises a step A) of providing a semiconductor substrate (1) having a plurality of integrated electronic circuits (2) on a top side (10) thereof. In a step B), a sacrificial layer (3) is applied on one side of the semiconductor substrate. In a step C), holes (30) are introduced in the sacrificial layer so that at least one hole is formed above each electronic circuit. In a step D), the semiconductor substrate is adhered to a carrier (5) with the sacrificial layer at the front, an adhesive layer (4) being used between the sacrificial layer and the carrier, and the adhesive layer filling the holes so that holding elements (40) from the adhesive layer are formed in the holes. In a step E) the semiconductor substrate is thinned. In a step F) separation trenches (6) are introduced between the electronic circuits, which extend from a side of the electronic circuits facing away from the carrier to the sacrificial layer and penetrate the thinned semiconductor substrate. In a step G) the sacrificial layer is removed in the region between the electronic circuits and the carrier.
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公开(公告)号:US11251081B2
公开(公告)日:2022-02-15
申请号:US16758659
申请日:2018-10-25
Applicant: OSRAM OLED GmbH
Inventor: Thomas Schwarz , Lutz Höppel , Thorsten Frank Baumheinrich , Jens Richter
Abstract: The method of manufacturing a plurality of semiconductor chips (100) comprises a step A) of providing a semiconductor substrate (1) having a plurality of integrated electronic circuits (2) on a top side (10) thereof. In a step B), a sacrificial layer (3) is applied on one side of the semiconductor substrate. In a step C), holes (30) are introduced in the sacrificial layer so that at least one hole is formed above each electronic circuit. In a step D), the semiconductor substrate is adhered to a carrier (5) with the sacrificial layer at the front, an adhesive layer (4) being used between the sacrificial layer and the carrier, and the adhesive layer filling the holes so that holding elements (40) from the adhesive layer are formed in the holes. In a step E) the semiconductor substrate is thinned. In a step F) separation trenches (6) are introduced between the electronic circuits, which extend from a side of the electronic circuits facing away from the carrier to the sacrificial layer and penetrate the thinned semiconductor substrate. In a step G) the sacrificial layer is removed in the region between the electronic circuits and the carrier.
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