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公开(公告)号：US20240363660A1
公开(公告)日：2024-10-31
申请号：US18306517
申请日：2023-04-25
发明人： Hui Zang
IPC分类号： H01L27/146
CPC分类号： H01L27/1463 , H01L27/14649 , H01L27/14689
摘要： A pixel includes a semiconductor substrate having a first side and a second side. Extending from the first side is a first deep trench isolation (DTI) structure and a second DTI structure. The first DTI structure includes a wide portion and a narrow portion extending from the wide portion. A first width of the wide portion is greater than a second width of the narrow portion, and the wide portion extends to a first depth. The pixel further includes a photodiode region disposed in the semiconductor substrate between the first DTI structure and the second DTI structure. A cell deep trench isolation (CDTI) structure is disposed between the wide portion of the first DTI structure and the second DTI structure. The CDTI structure extends to a second depth. The first depth and the second depth extend a substantially equal distance from the first side of the semiconductor substrate.
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公开(公告)号：US11843019B2
公开(公告)日：2023-12-12
申请号：US16689847
申请日：2019-11-20
发明人： Hui Zang , Cunyu Yang , Gang Chen
IPC分类号： H01L27/146
CPC分类号： H01L27/14645 , H01L27/14603 , H01L27/14683
摘要： A pixel includes a semiconductor substrate, a low-κ dielectric, and a photodiode region in the semiconductor substrate. The semiconductor substrate has a substrate top surface that forms a trench. The trench extends into the semiconductor substrate and has a trench depth relative to a planar region of the substrate top surface surrounding the trench. The low-κ dielectric is in the trench between the trench depth and a low-κ depth with respect to the planar region. The low-κ depth is less than the trench depth. The photodiode region is in the semiconductor substrate and includes (i) a bottom photodiode section beneath the trench and (ii) a top photodiode section adjacent to the trench. The top photodiode section begins at a photodiode depth, with respect to the planar region, that is less than the low-κ depth, and extends toward and adjoining the bottom photodiode section.
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公开(公告)号：US11810931B2
公开(公告)日：2023-11-07
申请号：US17220651
申请日：2021-04-01
IPC分类号： H01L27/146 , H04N25/77
CPC分类号： H01L27/14614 , H01L27/1461 , H01L27/14603 , H01L27/14641 , H01L27/1463 , H04N25/77
摘要： A pixel-array substrate includes (i) a semiconductor substrate including a photodiode region and a floating diffusion region, and (ii) a vertical-transfer-gate structure that includes a trench and a gate electrode. The trench is defined by a bottom surface and a sidewall surface of the substrate each located between a front substrate-surface and a back substrate-surface thereof. The trench extends into the substrate. In a cross-sectional plane perpendicular to the front substrate-surface and intersecting the floating diffusion region, the photodiode region, and the sidewall surface, (a) the trench is located between the floating diffusion region and the photodiode region, and (b) a top section of the sidewall surface is adjacent to the floating diffusion region. A gate electrode partially fills the trench such that the top section and a conductive-surface of the gate electrode in-part define a recess located between the floating diffusion region and the gate electrode.
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公开(公告)号：US20230223413A1
公开(公告)日：2023-07-13
申请号：US17571856
申请日：2022-01-10
IPC分类号： H01L27/146
CPC分类号： H01L27/14614 , H01L27/14616 , H01L27/14643 , H01L27/14689
摘要： Transistors include trenches formed in the semiconductor substrate having a first conductive type. The trenches define, in a channel width plane of the transistor, at least one nonplanar substrate structure having a plurality of sidewall portions and a tip portion disposed between the plurality of sidewall portions. An epitaxial overlayer is epitaxially grown on the sidewall portions and the tip portion. A channel doping layer having a doped portion of the semiconductor substrate is formed in the nonplanar substrate structure and enclosed by the epitaxial overlayer. An isolation layer is disposed in the trenches and over the epitaxial overlayer. A gate is disposed on the isolation layer and extends into the trenches.
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公开(公告)号：US20230215900A1
公开(公告)日：2023-07-06
申请号：US17568909
申请日：2022-01-05
IPC分类号： H01L27/146
CPC分类号： H01L27/14638 , H01L27/1463
摘要： Pixels, such as for image sensors and electronic devices, include a photodiode formed in a semiconductor substrate, a floating diffusion, and a transfer structure selectively coupling the photodiode to the floating diffusion. The transfer structure includes a transfer gate formed on the semiconductor substrate, and a vertical channel structure including spaced apart first doped regions formed in the semiconductor substrate between the transfer gate and the photodiode. Each spaced apart first doped region is doped at a first dopant concentration with a first-type dopant. The spaced apart first doped regions are formed in a second doped region doped at a second dopant concentration with a second-type dopant of a different conductive type.
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公开(公告)号：US11695029B2
公开(公告)日：2023-07-04
申请号：US17556141
申请日：2021-12-20
IPC分类号： H01L27/146
CPC分类号： H01L27/14643 , H01L27/14601 , H01L27/14605 , H01L27/14683
摘要： A method for forming a pixel includes forming, in a semiconductor substrate, a wide trench having an upper depth with respect to a planar top surface of the semiconductor substrate. The method also includes ion-implanting a floating-diffusion region between the planar top surface and a junction depth in the semiconductor substrate. In a cross-sectional plane perpendicular to the planar top surface, the floating-diffusion region has (i) an upper width between the planar top surface and the upper depth, and (ii) between the upper depth and the junction depth, a lower width that exceeds the upper width. Part of the floating-diffusion region is beneath the wide trench and between the upper depth and the junction depth.
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公开(公告)号：US11538836B2
公开(公告)日：2022-12-27
申请号：US16993018
申请日：2020-08-13
发明人： Hui Zang , Gang Chen , Chao Niu , Zhiqiang Lin
IPC分类号： H01L27/146
摘要： A pixel cell includes a photodiode disposed proximate to a front side of a semiconductor layer to generate image charge in response to incident light directed through a backside of the semiconductor layer. A cell deep trench isolation (CDTI) structure is disposed along an optical path of the incident light to the photodiode and proximate to the backside of the semiconductor layer. The CDTI structure includes a plurality of portions arranged in the semiconductor layer. Each of the plurality of portions extends a respective depth from the backside towards the front side of the semiconductor layer. The respective depth of each of the plurality of portions is different than a respective depth of a neighboring one of the plurality of portions. Each of the plurality of portions is laterally separated and spaced apart from said neighboring one of the plurality of portions in the semiconductor layer.
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公开(公告)号：US20220328545A1
公开(公告)日：2022-10-13
申请号：US17229664
申请日：2021-04-13
IPC分类号： H01L27/146 , H04N5/378 , H04N5/3745
摘要： A pixel circuit includes a photodiode and a floating diffusion disposed in a semiconductor substrate. A transfer gate is disposed between the photodiode and the floating diffusion to transfer photogenerated image charge from the photodiode to the floating diffusion. A dual floating diffusion (DFD) transistor is coupled between the floating diffusion and a DFD capacitor. The DFD transistor includes a DFD gate that includes a planar gate portion disposed over a surface of the semiconductor substrate and a vertical gate portion that extends vertically from the planar gate portion into the semiconductor substrate. The vertical gate portion of the DFD gate is configured to increase a gate to substrate coupling capacitance of the DFD transistor. The gate to substrate coupling capacitance and the DFD capacitor are coupled to increase an effective capacitance associated with the floating diffusion in response to the DFD transistor being turned on.
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公开(公告)号：US11450696B1
公开(公告)日：2022-09-20
申请号：US17229664
申请日：2021-04-13
IPC分类号： H04N5/374 , H04N5/378 , H04N5/355 , H01L27/146 , H04N5/3745
摘要： A pixel circuit includes a photodiode and a floating diffusion disposed in a semiconductor substrate. A transfer gate is disposed between the photodiode and the floating diffusion to transfer photogenerated image charge from the photodiode to the floating diffusion. A dual floating diffusion (DFD) transistor is coupled between the floating diffusion and a DFD capacitor. The DFD transistor includes a DFD gate that includes a planar gate portion disposed over a surface of the semiconductor substrate and a vertical gate portion that extends vertically from the planar gate portion into the semiconductor substrate. The vertical gate portion of the DFD gate is configured to increase a gate to substrate coupling capacitance of the DFD transistor. The gate to substrate coupling capacitance and the DFD capacitor are coupled to increase an effective capacitance associated with the floating diffusion in response to the DFD transistor being turned on.
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公开(公告)号：US11244979B2
公开(公告)日：2022-02-08
申请号：US16720236
申请日：2019-12-19
IPC分类号： H01L27/146
摘要： A semiconductor structure for a CMOS image sensor includes a semiconductor substrate having a first side and a second side. A photodiode is disposed in the semiconductor substrate proximate to the first side. The photodiode accumulates image charge photogenerated in the photodiode in response to incident light directed through the second side. A deep trench isolation structure enclosing the photodiode. The deep trench isolation structure extends from the second side toward the first side. The deep trench isolation structure includes a light absorption region disposed at a first end of the deep trench isolation structure toward the first side.
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