摘要:
A chemical mechanical polishing apparatus includes a platen having a first region configured to support a wafer, and a second region disposed outside the first region. The chemical mechanical polishing apparatus further includes a polishing pad disposed on the platen, a pad head to which the polishing pad is attached, a slurry supply configured to supply a slurry onto the wafer, and an injection port disposing on the second region of the platen. The injection port is configured to inject a predetermined gas to an edge of a bottom surface of the wafer and toward the outside of the wafer.
摘要:
A chemical mechanical polishing apparatus includes a platen having a first region configured to support a wafer, and a second region disposed outside the first region. The chemical mechanical polishing apparatus further includes a polishing pad disposed on the platen, a pad head to which the polishing pad is attached, a slurry supply configured to supply a slurry onto the wafer, and an injection port disposing on the second region of the platen. The injection port is configured to inject a predetermined gas to an edge of a bottom surface of the wafer and toward the outside of the wafer.
摘要:
A chemical mechanical polishing apparatus includes a platen configured to support and rotate a wafer, and a polishing pad facing the platen. The polishing pad includes a body having a groove with a rotational symmetric pattern.
摘要:
A chemical mechanical polishing apparatus includes a platen configured to support and rotate a wafer, and a polishing pad facing the platen. The polishing pad includes a body having a groove with a rotational symmetric pattern.
摘要:
A method of fabricating a non-volatile memory device, which has a tunnel insulating layer consisting of two or more portions of different thickness, cell transistors, and auxiliary transistors for applying external voltage and for interfacing with peripheral circuits is described. According to the method, the tunnel insulating layer, a conductive layer, and a first insulating layer are sequentially deposited over a semiconductor substrate. The resultant structure is selectively etched to a given depth to form trenches. A second insulating layer is deposited over the substrate including the trenches, and the second insulating layer is selectively removed so as to form element isolation regions consisting of the trenches filled with the second insulating layer. The first insulating layer is selectively removed, and the second insulating layer is selectively removed by a CMP process to expose the conductive layer. The conductive layer is used as the stopping layer during the CMP process.