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1.发明授权Method of modifying a microchip layout data set to generate a predicted mask printed data set 失效修改微芯片布局数据集以产生预测的掩模印刷数据集的方法公开(公告)号：US06261724B1
公开(公告)日：2001-07-17
申请号：US09334367
申请日：1999-06-16
IPC分类号： G03F900
CPC分类号： G03F7/70433 , G03F1/36 , G03F7/70441
摘要： A method is presented here that enables one to improve the prediction for the printed structures of circuit patterns in a microchip, thereby potentially aiding in the design of the microchip circuitry. This method comprises the steps of determining, by applying process bias and corner curvature rules to a real mask image, a simulated structure for the mask used in optical projection lithography; and determining, by applying optical and process proximity correction rules to said simulated mask structure, a more accurate prediction for the structures printed on the wafer. Preferably the simulated mask structure is determined by applying a symmetric bias consistent with a mask build process to the real mask image, adjusting predetermined features of the real mask image such as corners or narrow lines, and applying a reverse symmetric bias to the adjusted real mask image.
摘要翻译： 这里呈现出一种可以改进对微芯片中电路图案的印刷结构的预测的方法，从而有助于微芯片电路的设计。 该方法包括以下步骤：通过将光学投影光刻中使用的掩模的模拟结构应用于实际掩模图像来确定加工偏压和拐角曲率规则; 以及通过对所述模拟掩模结构应用光学和过程接近校正规则来确定印刷在晶片上的结构的更准确的预测。 优选地，通过将与掩模构建处理一致的对称偏置应用于真实掩模图像来确定模拟掩模结构，调整真实掩模图像的预定特征，例如拐角或窄线，以及将反向对称偏压施加到经调整的真实掩模 图片。
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公开(公告)号：US06704695B1
公开(公告)日：2004-03-09
申请号：US09354879
申请日：1999-07-16
IPC分类号： G06G748
CPC分类号： G03F1/36
摘要： A method and structure for creating a photomask data set includes inputting a design data set, creating a simulated printed data set by applying a lithography simulation model to chosen levels of the design data set, merging each chosen level of the design data set with each corresponding level of the simulated printed data set in order to produce a merged design data set, applying at least one test to the merged design data set, correcting the design data set based on results of the test to produce a corrected design data set, repeating the creating of the simulated printed data, merging, applying the test and correcting using the corrected design data set until the corrected design data set passes the test, and outputting the corrected design data set as the photomask data set.
摘要翻译： 一种用于创建光掩模数据集的方法和结构，包括输入设计数据集，通过将光刻仿真模型应用于设计数据集的选定级别来创建模拟印刷数据集，将每个选定级别的设计数据集与每个相应的 水平的模拟印刷数据集合，以便产生合并的设计数据集，对合并的设计数据集应用至少一个测试，基于测试结果校正设计数据集，以产生校正的设计数据集，重复 创建模拟打印数据，合并，应用测试并使用校正后的设计数据集进行校正，直到校正后的设计数据集通过测试，并输出校正后的设计数据集作为光掩模数据集。
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公开(公告)号：US06667136B2
公开(公告)日：2003-12-23
申请号：US10200912
申请日：2002-07-22
IPC分类号： G03F900
摘要： A method and structure for a photomask that includes a substrate having a first transmittance, a first pattern to be transferred to a photosensitive layer (the first pattern having a second transmittance lower than the first transmittance) and a second pattern having a third transmittance greater than the second transmittance and less than the first transmittance. The second pattern is adjacent at least a portion of the first pattern, and the substrate and the second pattern transmit light substantially in phase.
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4.发明授权Error checking of simulated printed images with process window effects included 有权对包含过程窗口效应的模拟打印图像进行错误检查公开(公告)号：US06373975B1
公开(公告)日：2002-04-16
申请号：US09237148
申请日：1999-01-25
IPC分类号： G06K900
CPC分类号： G06T7/0006 , G03F1/36 , G06T2207/30148
摘要： A structure and method for checking semiconductor designs for design rule violations includes generating a predicted printed structure (i.e., an ideal image) based on the semiconductor designs, altering the ideal image to include potential manufacturing variations, thereby producing at least two production images representing different manufacturing qualities, and comparing the production images to the design rules to produce an error list.
摘要翻译： 用于检查用于设计规则违规的半导体设计的结构和方法包括基于半导体设计产生预测的印刷结构（即，理想图像），改变理想图像以包括潜在的制造变化，由此产生至少两个代表不同的生产图像 制造质量，并将生产图像与设计规则进行比较以产生错误列表。
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公开(公告)号：US06425112B1
公开(公告)日：2002-07-23
申请号：US09335305
申请日：1999-06-17
IPC分类号： E06F1750
CPC分类号： G03F1/36 , G06F17/5081
摘要： A method and computer system are provided for checking integrated circuit designs for design rule violations. The method may include generating a working design data set, creating a wafer image data set, comparing the wafer image data set to the design rules to produce an error list and automatically altering the working design data set when the comparing indicates a design rule violation. The method further automatically repeats the creating, the comparing and the automatically altering until no design rule violations occur or no solution to the errors exists.
摘要翻译： 提供了一种用于检查设计规则违规的集成电路设计的方法和计算机系统。 该方法可以包括生成工作设计数据集，创建晶片图像数据集，将晶片图像数据集与设计规则进行比较以产生错误列表，并且当比较指示设计规则违反时自动改变工作设计数据集。 该方法进一步自动重复创建，比较和自动更改，直到没有设计规则违规发生或没有解决方案存在错误。
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公开(公告)号：US06458493B2
公开(公告)日：2002-10-01
申请号：US09325945
申请日：1999-06-04
IPC分类号： G03F900
摘要： A method and structure for a photomask that includes a substrate having a first transmittance, a first pattern to be transferred to a photosensitive layer (the first pattern having a second transmittance lower than the first transmittance) and a second pattern having a third transmittance greater than the second transmittance and less than the first transmittance. The second pattern is adjacent at least a portion of the first pattern, and the substrate and the second pattern transmit light substantially in phase.
摘要翻译： 一种光掩模的方法和结构，其包括具有第一透射率的衬底，要转印到感光层的第一图案（具有低于第一透射率的第二透射率的第一图案）和具有第三透射率的第二图案 第二透射率和小于第一透射率。 第二图案与第一图案的至少一部分相邻，并且基板和第二图案基本上同相地发射光。
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公开(公告)号：US06258490B1
公开(公告)日：2001-07-10
申请号：US09350863
申请日：1999-07-09
IPC分类号： G03F900
摘要： A transmission controlled mask (TCM) for providing effective and accurate printing of images on a semiconductor wafer is defined. The transmission controlled mask (TCM) of the present invention includes opaque regions, clear regions, and transmission controlled (TC) regions, each region have different transmittance for reducing and/or eliminating the foreshortening which occurs in image printing. By employing the TCM of the present invention and adjusting the exposure time, images of lines and holes may be printed correctly with the same mask. The TCM of the present invention comprises a quartz substrate having a carbon layer and a chrome layer deposited on its surface.
摘要翻译： 定义了用于在半导体晶片上提供有效和准确的图像打印的传输控制掩模（TCM）。 本发明的透射控制掩模（TCM）包括不透明区域，透明区域和透射控制（TC）区域，每个区域具有不同的透射率，用于减少和/或消除在图像打印中发生的缩短。 通过采用本发明的TCM并调整曝光时间，可以用相同的掩模正确地印刷线和孔的图像。 本发明的TCM包括在其表面上沉积有碳层和铬层的石英基底。
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公开(公告)号：US07257247B2
公开(公告)日：2007-08-14
申请号：US09683836
申请日：2002-02-21
申请人： James A. Bruce , Orest Bula , Edward W. Conrad , William C. Leipold , Michael S. Hibbs , Joshua J. Krueger
发明人： James A. Bruce , Orest Bula , Edward W. Conrad , William C. Leipold , Michael S. Hibbs , Joshua J. Krueger
IPC分类号： G06K9/00
CPC分类号： G03F1/84
摘要： An automated system for analyzing mask defects in a semiconductor manufacturing process is presented. This system combines results from an inspection tool and design layout data from a design data repository corresponding to each mask layer being inspected with a computer program and a predetermined rule set to determine when a defect on a given mask layer has occurred. Mask inspection results include the presence, location and type (clear or opaque) of defects. Ultimately, a determination is made as to whether to scrap, repair or accept a given mask based on whether the defect would be likely to cause product failure. Application of the defect inspection data to the design layout data for each mask layer being inspected prevents otherwise acceptable wafer masks from being scrapped when the identified defects are not in critical areas of the mask.
摘要翻译： 提出了一种用于分析半导体制造过程中的掩模缺陷的自动化系统。 该系统将来自检查工具的结果和来自被检查的每个掩模层的设计数据存储库的设计布局数据与计算机程序和预定规则集相结合，以确定给定掩模层上的缺陷何时发生。 掩模检查结果包括缺陷的存在，位置和类型（透明或不透明）。 最终，根据缺陷是否可能导致产品故障，确定是否废除，修理或接受给定的掩模。 将缺陷检查数据应用于被检查的每个掩模层的设计布局数据防止当所识别的缺陷不在掩模的关键区域时被报废。
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公开(公告)号：US07492940B2
公开(公告)日：2009-02-17
申请号：US11761856
申请日：2007-06-12
申请人： James A. Bruce , Orest Bula , Edward W. Conrad , William C. Leipold , Michael S. Hibbs , Joshua J. Krueger
发明人： James A. Bruce , Orest Bula , Edward W. Conrad , William C. Leipold , Michael S. Hibbs , Joshua J. Krueger
IPC分类号： G06K9/00
CPC分类号： G03F1/84
摘要： An automated system for analyzing mask defects in a semiconductor manufacturing process is presented. This system combines results from an inspection tool and design layout data from a design data repository corresponding to each mask layer being inspected with a computer program and a predetermined rule set to determine when a defect on a given mask layer has occurred. Mask inspection results include the presence, location and type (clear or opaque) of defects. Ultimately, a determination is made as to whether to scrap, repair or accept a given mask based on whether the defect would be likely to cause product failure. Application of the defect inspection data to the design layout data for each mask layer being inspected prevents otherwise acceptable wafer masks from being scrapped when the identified defects are not in critical areas of the mask.
摘要翻译： 提出了一种用于分析半导体制造过程中的掩模缺陷的自动化系统。 该系统将来自检查工具的结果和来自被检查的每个掩模层的设计数据存储库的设计布局数据与计算机程序和预定规则集相结合，以确定何时发生了给定掩模层上的缺陷。 掩模检查结果包括缺陷的存在，位置和类型（透明或不透明）。 最终，根据缺陷是否可能导致产品故障，确定是否废除，修理或接受给定的掩模。 将缺陷检查数据应用于被检查的每个掩模层的设计布局数据防止当所识别的缺陷不在掩模的关键区域时被报废。
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公开(公告)号：US07492941B2
公开(公告)日：2009-02-17
申请号：US11769431
申请日：2007-06-27
申请人： James A. Bruce , Orest Bula , Edward W. Conrad , William C. Leipold , Michael S. Hibbs , Joshua J. Krueger
发明人： James A. Bruce , Orest Bula , Edward W. Conrad , William C. Leipold , Michael S. Hibbs , Joshua J. Krueger
IPC分类号： G06K9/00
CPC分类号： G03F1/84
摘要： An automated system for analyzing mask defects in a semiconductor manufacturing process is presented. This system combines results from an inspection tool and design layout data from a design data repository corresponding to each mask layer being inspected with a computer program and a predetermined rule set to determine when a defect on a given mask layer has occurred. Mask inspection results include the presence, location and type (clear or opaque) of defects. Ultimately, a determination is made as to whether to scrap, repair or accept a given mask based on whether the defect would be likely to cause product failure. Application of the defect inspection data to the design layout data for each mask layer being inspected prevents otherwise acceptable wafer masks from being scrapped when the identified defects are not in critical areas of the mask.
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