公开(公告)号：US20160142014A1

公开(公告)日：2016-05-19

申请号：US14885671

申请日：2015-10-16

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： YUKIO OKAZAKI ,  MASAKATSU MAEDA ,  SHIGEKI NAKAMURA ,  AKINORI DAIMO

IPC: H03F1/02 ,  H03F3/21 ,  H03F3/193

CPC classification number: H03F3/193 ,  H03F1/0261 ,  H03F1/301 ,  H03F3/245 ,  H03F2200/18 ,  H03F2200/27 ,  H03F2200/451 ,  H03F2200/453 ,  H03F2200/541 ,  H03F2200/555

Abstract: A bias circuit comprises: a first circuit that comprises a first resistor and a decoupling capacitor; a bias voltage generation circuit that comprises a first transistor being connected to the first circuit; one or more switches; a first replica circuit comprising a second circuit and a second transistor, the second circuit comprising a second resistor and a capacitor, the second transistor being connected to the second circuit; a second replica circuit comprising a third transistor; a comparator that makes a comparison between a pseudo-bias voltage and a reference voltage; and a control circuit that controls the one or more switches on the basis of the comparison result to reduce the amount of the current flowing through the first transistor.

Abstract translation: 偏置电路包括：第一电路，包括第一电阻器和去耦电容器; 偏置电压产生电路，包括连接到第一电路的第一晶体管; 一个或多个开关; 包括第二电路和第二晶体管的第一复制电路，所述第二电路包括第二电阻器和电容器，所述第二晶体管连接到所述第二电路; 第二复制电路，包括第三晶体管; 比较器，用于比较伪偏置电压和参考电压; 以及基于比较结果控制一个或多个开关的控制电路，以减少流经第一晶体管的电流量。