Device discovery and topology reporting in a combined CPU/GPU architecture system
    1.
    发明授权
    Device discovery and topology reporting in a combined CPU/GPU architecture system 有权
    组合CPU / GPU架构系统中的设备发现和拓扑报告

    公开(公告)号:US08797332B2

    公开(公告)日:2014-08-05

    申请号:US13325824

    申请日:2011-12-14

    CPC分类号: G06T1/20 G06F9/30003

    摘要: Methods and apparatus are provided, as an aspect of a combined CPU/APD architecture system, for discovering and reporting properties of devices and system topology that are relevant to efficiently scheduling and distributing computational tasks to the various computational resources of a combined CPU/APD architecture system. The combined CPU/APD architecture unifies CPUs and APDs in a flexible computing environment. In some embodiments, the combined CPU/APD architecture capabilities are implemented in a single integrated circuit, elements of which can include one or more CPU cores and one or more APD cores. The combined CPU/APD architecture creates a foundation upon which existing and new programming frameworks, languages, and tools can be constructed.

    摘要翻译: 提供了作为组合的CPU / APD架构系统的一个方面的方法和装置,用于发现和报告与有效地调度和分发计算任务到组合的CPU / APD架构的各种计算资源相关的设备和系统拓扑的属性 系统。 组合的CPU / APD架构将CPU和APD统一在灵活的计算环境中。 在一些实施例中,组合的CPU / APD架构能力在单个集成电路中实现,其单元可以包括一个或多个CPU核心和一个或多个APD核心。 组合的CPU / APD架构创建了可以构建现有和新的编程框架,语言和工具的基础。

    Device Discovery and Topology Reporting in a Combined CPU/GPU Architecture System
    2.
    发明申请
    Device Discovery and Topology Reporting in a Combined CPU/GPU Architecture System 有权
    组合CPU / GPU架构系统中的设备发现和拓扑报告

    公开(公告)号:US20120162234A1

    公开(公告)日:2012-06-28

    申请号:US13325824

    申请日:2011-12-14

    IPC分类号: G06T1/20 G06T1/60

    CPC分类号: G06T1/20 G06F9/30003

    摘要: Methods and apparatus are provided, as an aspect of a combined CPU/APD architecture system, for discovering and reporting properties of devices and system topology that are relevant to efficiently scheduling and distributing computational tasks to the various computational resources of a combined CPU/APD architecture system. The combined CPU/APD architecture unifies CPUs and APDs in a flexible computing environment. In some embodiments, the combined CPU/APD architecture capabilities are implemented in a single integrated circuit, elements of which can include one or more CPU cores and one or more APD cores. The combined CPU/APD architecture creates a foundation upon which existing and new programming frameworks, languages, and tools can be constructed.

    摘要翻译: 提供了作为组合的CPU / APD架构系统的一个方面的方法和装置,用于发现和报告与有效地调度和分发计算任务到组合的CPU / APD架构的各种计算资源相关的设备和系统拓扑的属性 系统。 组合的CPU / APD架构将CPU和APD统一在灵活的计算环境中。 在一些实施例中,组合的CPU / APD架构能力在单个集成电路中实现,其单元可以包括一个或多个CPU核心和一个或多个APD核心。 组合的CPU / APD架构创建了可以构建现有和新的编程框架,语言和工具的基础。