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公开(公告)号：US20070181924A1
公开(公告)日：2007-08-09
申请号：US11538227
申请日：2006-10-03
IPC分类号： H01L29/94 , H01L27/108 , H01L29/76 , H01L31/119
CPC分类号： H01L27/0805 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor component includes an integrated capacitor structure embodied at least partly in an electrically conductive plane and which is patterned such that a multiplicity of strip elements are present. A first group of strip elements constitutes a first electrode of the capacitor structure and a second group of strip elements constitutes a second electrode of the capacitor structure. The first strip elements together with the second strip elements being at least partly interlinked in one another, and at least one strip element may have a non-constant width along its length.
摘要翻译： 半导体部件包括至少部分地在导电平面中实现的集成电容器结构，并且被图案化以使得存在多个带状元件。 第一组带状元件构成电容器结构的第一电极，第二组带状元件构成电容器结构的第二电极。 第一带状元件与第二带状元件一起至少部分地彼此连接，并且至少一个带状元件沿其长度可以具有不恒定的宽度。
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公开(公告)号：US07485945B2
公开(公告)日：2009-02-03
申请号：US11538227
申请日：2006-10-03
IPC分类号： H01L29/00
CPC分类号： H01L27/0805 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor component includes an integrated capacitor structure embodied at least partly in an electrically conductive plane and which is patterned such that a multiplicity of strip elements are present. A first group of strip elements constitutes a first electrode of the capacitor structure and a second group of strip elements constitutes a second electrode of the capacitor structure. The first strip elements together with the second strip elements being at least partly interlinked in one another, and at least one strip element may have a non-constant width along its length.
摘要翻译： 半导体部件包括至少部分地在导电平面中实现的集成电容器结构，并且被图案化以使得存在多个带状元件。 第一组带状元件构成电容器结构的第一电极，第二组带状元件构成电容器结构的第二电极。 第一带状元件与第二带状元件一起至少部分地彼此连接，并且至少一个带状元件沿其长度可以具有不恒定的宽度。
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公开(公告)号：US20120099243A1
公开(公告)日：2012-04-26
申请号：US13344714
申请日：2012-01-06
申请人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
发明人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
IPC分类号： H01G4/005
CPC分类号： H01L27/0805 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a capacitor plate includes a plurality of first parallel conductive members, and a plurality of second parallel conductive members disposed over the plurality of first parallel conductive members. A first base member is coupled to an end of the plurality of first parallel conductive members, and a second base member is coupled to an end of the plurality of second parallel conductive members. A connecting member is disposed between the plurality of first parallel conductive members and the plurality of second parallel conductive members, wherein the connecting member includes at least one elongated via.
摘要翻译： 公开了半导体器件及其制造方法。 在一个实施例中，电容器板包括多个第一平行导电构件，以及设置在多个第一平行导电构件上的多个第二平行导电构件。 第一基座构件联接到多个第一平行导电构件的端部，并且第二基座构件联接到多个第二平行导电构件的端部。 连接构件设置在多个第一平行导电构件和多个第二平行导电构件之间，其中连接构件包括至少一个细长通孔。
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公开(公告)号：US08138539B2
公开(公告)日：2012-03-20
申请号：US11947591
申请日：2007-11-29
申请人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
发明人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
IPC分类号： H01L27/108 , H01L21/20
CPC分类号： H01L27/0805 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a capacitor plate includes a plurality of first parallel conductive members, and a plurality of second parallel conductive members disposed over the plurality of first parallel conductive members. A first base member is coupled to an end of the plurality of first parallel conductive members, and a second base member is coupled to an end of the plurality of second parallel conductive members. A connecting member is disposed between the plurality of first parallel conductive members and the plurality of second parallel conductive members, wherein the connecting member includes at least one elongated via.
摘要翻译： 公开了半导体器件及其制造方法。 在一个实施例中，电容器板包括多个第一平行导电构件，以及设置在多个第一平行导电构件上的多个第二平行导电构件。 第一基座构件联接到多个第一平行导电构件的端部，并且第二基座构件联接到多个第二平行导电构件的端部。 连接构件设置在多个第一平行导电构件和多个第二平行导电构件之间，其中连接构件包括至少一个细长通孔。
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公开(公告)号：US08394696B2
公开(公告)日：2013-03-12
申请号：US12971520
申请日：2010-12-17
申请人： Peter Baumgartner , Philipp Riess , Thomas Benetik
发明人： Peter Baumgartner , Philipp Riess , Thomas Benetik
IPC分类号： H01L51/05
CPC分类号： H01L27/0688 , H01L23/5223 , H01L27/0805 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a capacitance, the numerical value of which is relevant for a device function. The capacitance is formed from a parallel connection of at least a first and a second capacitor element, wherein the first and second capacitor elements are formed in respective manufacturing steps that exhibit uncorrelated process fluctuations.
摘要翻译： 半导体器件包括其数值与器件功能相关的电容。 电容由至少第一和第二电容器元件的并联连接形成，其中第一和第二电容器元件形成在显示不相关的工艺波动的各个制造步骤中。
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公开(公告)号：US20090014832A1
公开(公告)日：2009-01-15
申请号：US11775086
申请日：2007-07-09
申请人： Peter Baumgartner , Philipp Riess , Thomas Benetik
发明人： Peter Baumgartner , Philipp Riess , Thomas Benetik
CPC分类号： H01L27/0688 , H01L23/5223 , H01L27/0805 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a capacitance, the numerical value of which is relevant for a device function. The capacitance is formed from a parallel connection of at least a first and a second capacitor element, wherein the first and second capacitor elements are formed in respective manufacturing steps that exhibit uncorrelated process fluctuations.
摘要翻译： 半导体器件包括其数值与器件功能相关的电容。 电容由至少第一和第二电容器元件的并联连接形成，其中第一和第二电容器元件形成在显示不相关的工艺波动的各个制造步骤中。
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公开(公告)号：US20110086487A1
公开(公告)日：2011-04-14
申请号：US12971520
申请日：2010-12-17
申请人： Peter Baumgartner , Philipp Riess , Thomas Benetik
发明人： Peter Baumgartner , Philipp Riess , Thomas Benetik
IPC分类号： H01L21/02
CPC分类号： H01L27/0688 , H01L23/5223 , H01L27/0805 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a capacitance, the numerical value of which is relevant for a device function. The capacitance is formed from a parallel connection of at least a first and a second capacitor element, wherein the first and second capacitor elements are formed in respective manufacturing steps that exhibit uncorrelated process fluctuations.
摘要翻译： 半导体器件包括其数值与器件功能相关的电容。 电容由至少第一和第二电容器元件的并联连接形成，其中第一和第二电容器元件形成在显示不相关的工艺波动的各个制造步骤中。
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公开(公告)号：US20090141424A1
公开(公告)日：2009-06-04
申请号：US11947591
申请日：2007-11-29
申请人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
发明人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
CPC分类号： H01L27/0805 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a capacitor plate includes a plurality of first parallel conductive members, and a plurality of second parallel conductive members disposed over the plurality of first parallel conductive members. A first base member is coupled to an end of the plurality of first parallel conductive members, and a second base member is coupled to an end of the plurality of second parallel conductive members. A connecting member is disposed between the plurality of first parallel conductive members and the plurality of second parallel conductive members, wherein the connecting member includes at least one elongated via.
摘要翻译： 公开了半导体器件及其制造方法。 在一个实施例中，电容器板包括多个第一平行导电构件，以及设置在多个第一平行导电构件上的多个第二平行导电构件。 第一基座构件联接到多个第一平行导电构件的端部，并且第二基座构件联接到多个第二平行导电构件的端部。 连接构件设置在多个第一平行导电构件和多个第二平行导电构件之间，其中连接构件包括至少一个细长通孔。
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公开(公告)号：US08569820B2
公开(公告)日：2013-10-29
申请号：US13344714
申请日：2012-01-06
申请人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
发明人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
IPC分类号： H01L27/108
CPC分类号： H01L27/0805 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a capacitor plate includes a plurality of first parallel conductive members, and a plurality of second parallel conductive members disposed over the plurality of first parallel conductive members. A first base member is coupled to an end of the plurality of first parallel conductive members, and a second base member is coupled to an end of the plurality of second parallel conductive members. A connecting member is disposed between the plurality of first parallel conductive members and the plurality of second parallel conductive members, wherein the connecting member includes at least one elongated via.
摘要翻译： 公开了半导体器件及其制造方法。 在一个实施例中，电容器板包括多个第一平行导电构件，以及设置在多个第一平行导电构件上的多个第二平行导电构件。 第一基座构件联接到多个第一平行导电构件的端部，并且第二基座构件联接到多个第二平行导电构件的端部。 连接构件设置在多个第一平行导电构件和多个第二平行导电构件之间，其中连接构件包括至少一个细长通孔。
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公开(公告)号：US20060284718A1
公开(公告)日：2006-12-21
申请号：US11156743
申请日：2005-06-20
申请人： Peter Baumgartner , Thomas Benetik
发明人： Peter Baumgartner , Thomas Benetik
IPC分类号： H01F27/28
CPC分类号： H01F17/0006 , H01F2021/125
摘要： Two inductors formed in multiple layers of conductive layers of integrated circuits are disclosed. Symmetric portions of a first inductor and a second inductor are formed in two or more conductive layers. Portions of the first inductor in adjacent conductive layers are connected by vias, and portions of the second inductor in adjacent conductive layers are connected by vias. The first and second inductor portions form a substantially loop-shaped structure in each conductive layer. The first and second inductor vias may be positioned at the same position within the substantially loop-shaped inductor structure by alternating inner and outer radiuses, or the vias for the second inductor may be positioned opposite the vias for the first inductor within the substantially loop-shaped inductor structure, using notches in the first and second inductor portions.
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