公开(公告)号：US4845381A

公开(公告)日：1989-07-04

申请号：US103841

申请日：1987-10-01

申请人： Peter Cuevas

发明人： Peter Cuevas

IPC分类号： H03K3/356

CPC分类号： H03K3/356113 ,  H03K3/356165

摘要： In the present invention, a voltage level shifting circuit is disclosed. The voltage level shifting circuit comprises a first inventer and a second inverter with each inverter having a P-type MOS transistor and an N-type MOS transistor. Each of the inverters has an input port, an output port, a first voltage port and a second voltage port. The source of the P-type MOS transistor or N-type MOS transistor of each inverter is connected to the first voltage port. The voltage level shifting circuit also comprises two MOS transistors of the same conductivity type as the transistors of the inverter whose source is connected to the first voltage port. Each of the MOS transistors has a source, a drain and a gate with the drain connected to the first voltage port of each of the inverters. The sources of the first and second MOS transistors are connected together and to a high voltage level, such as V.sub.pp. Cross-coupling is provided by connecting the gate of the MOS transistor to the output port of the other inverter. The output is taken from the output port of the second inverter.

摘要翻译： 在本发明中，公开了一种电压电平移位电路。 电压电平移位电路包括第一发明人和第二逆变器，每个逆变器具有P型MOS晶体管和N型MOS晶体管。 每个逆变器具有输入端口，输出端口，第一电压端口和第二电压端口。 每个逆变器的P型MOS晶体管或N型MOS晶体管的源极连接到第一电压端口。 电压电平移动电路还包括与源极连接到第一电压端口的逆变器的晶体管相同的导电类型的两个MOS晶体管。 每个MOS晶体管具有源极，漏极和栅极，漏极连接到每个逆变器的第一电压端口。 第一和第二MOS晶体管的源极连接在一起，并连接到诸如Vpp的高电压电平。 通过将MOS晶体管的栅极连接到另一个反相器的输出端口来提供交叉耦合。 输出取自第二个变频器的输出端口。

公开(公告)号：US07049713B2

公开(公告)日：2006-05-23

申请号：US10734002

申请日：2003-12-10

申请人： Peter Cuevas ,  Gedaliahoo Krieger ,  Maurice Evans ,  Jens Ullmann

发明人： Peter Cuevas ,  Gedaliahoo Krieger ,  Maurice Evans ,  Jens Ullmann

IPC分类号： H02M3/06

CPC分类号： G01R31/2841

摘要： A pulsed current generator circuit for providing current pulses to a device under test includes a current source for applying a current to the device under test and a controlled current shunt for shunting current from the device under test. A booster circuit is provided for supplying a booster current to the device under test when the controlled current shunt is opened and current again flows through the device under test, thereby facilitating recharge of a parasitic capacitance associated with the device under test.

摘要翻译： 用于向被测器件提供电流脉冲的脉冲电流发生器电路包括用于将电流施加到被测器件的电流源和用于从被测器件分流电流的受控电流分流器。 提供升压电路，用于当受控电流分流器断开并且电流再次流过被测器件时，向被测器件提供升压电流，从而有助于与被测器件相关联的寄生电容的再充电。

公开(公告)号：US06592389B2

公开(公告)日：2003-07-15

申请号：US10160318

申请日：2002-05-29

申请人： Peter Cuevas

发明人： Peter Cuevas

IPC分类号： H01R450

CPC分类号： H01R13/193 ,  H01R2201/20

摘要： A minimal insertion force socket for use in testing DIP integrated circuits having a plurality of leads extending therefrom, the socket plate having a plurality of holes arranged in two parallel rows for receiving the leads from the integrated circuit, and a plurality of wires anchored on the socket plate and arranged in two parallel partially interdigitated sets with each wire cooperating with a hole for engaging a lead of the integrated circuit. The working distance from a lead contact point on each wire to an anchor point on the interdigitated portion of each wire is increased relative to the working distance of aligned wires in the two parallel sets.

公开(公告)号：US06565373B2

公开(公告)日：2003-05-20

申请号：US10160303

申请日：2002-05-29

申请人： Peter Cuevas

发明人： Peter Cuevas

IPC分类号： H01R1122

CPC分类号： H01R13/193 ,  H01R2201/20

摘要： A socket for use in testing packaged integrated circuits having leads depending therefrom includes a first member for receiving the integrated package and having a plurality of first holes for receiving leads extending from the package. A second member has a plurality of wires for engaging the leads, each wire being anchored at ends to the second member with an intermediate portion engaging a lead. Each intermediate portion is aligned with a first hole and capable of being flexed out of alignment with the first hole for insertion of an integrated circuit package into the socket. The first member includes a second plurality of holes aligned with the wires of the second member, and an actuator has a plurality of pins arranged to extend into the second plurality of holes for engaging the plurality of wires and flexing the intermediate portions of the wires out of alignment with the first plurality of holes.

摘要翻译： 一种用于测试具有从其引出的引线的封装集成电路的插座，包括用于接收集成封装并具有多个用于接收从封装延伸的引线的第一孔的第一构件。 第二构件具有用于接合引线的多根电线，每根导线在与端子接合的中间部分处固定在第二构件的端部处。 每个中间部分与第一孔对准，并且能够与第一孔对准地弯曲，以将集成电路封装插入插座中。 第一构件包括与第二构件的线对准的第二多个孔，并且致动器具有布置成延伸到第二多个孔中的多个销，用于接合多根电线并使电线的中间部分弯曲出来 与第一多个孔对准。

公开(公告)号：US20070190823A1

公开(公告)日：2007-08-16

申请号：US10598825

申请日：2005-03-16

申请人： Peter Cuevas

发明人： Peter Cuevas

IPC分类号： H01R4/66

CPC分类号： H01R13/6586 ,  G01R1/06 ,  H01R24/562 ,  H01R2201/20

摘要： An interconnect assembly is for use in connection a semiconductor device under test (DUT) having a plurality of leads to electronic test equipment. The interconnect assembly includes a cable including a plurality of wires with a least one wire for sensing a signal from a DUT, at least one wire for a forcing signal to the DUT, and at least one wire for a guarding signal driven by the same electrical potential as the forcing signal. A male connector includes the plurality of wires, an outer metal coating surrounding the plurality of wires, and an insulating coating around the outer metal coating. A receptacle connector is for receiving the male connector and plurality of wires with corresponding contacts.

摘要翻译： 互连组件用于将具有多个引线的被测半导体器件（DUT）连接到电子测试设备。 所述互连组件包括电缆，所述电缆包括具有用于感测来自DUT的信号的至少一根导线的至少一根导线，用于向DUT施加强制信号的至少一根导线，以及用于由相同电气驱动的保护信号的至少一根导线 作为强制信号的潜力。 阳连接器包括多个电线，围绕多个电线的外部金属涂层以及围绕外部金属涂层的绝缘涂层。 插座连接器用于接收阳连接器和具有相应触头的多根导线。

公开(公告)号：US20050128655A1

公开(公告)日：2005-06-16

申请号：US10734002

申请日：2003-12-10

申请人： Peter Cuevas ,  Gedaliahoo Krieger ,  Maurice Evans ,  Jens Ullmann

发明人： Peter Cuevas ,  Gedaliahoo Krieger ,  Maurice Evans ,  Jens Ullmann

IPC分类号： G01R31/28 ,  H02H7/00

CPC分类号： G01R31/2841

摘要： A pulsed current generator circuit for providing current pulses to a device under test includes a current source for applying a current to the device under test and a controlled current shunt for shunting current from the device under test. A booster circuit is provided for supplying a booster current to the device under test when the controlled current shunt is opened and current again flows through the device under test, thereby facilitating recharge of a parasitic capacitance associated with the device under test.

摘要翻译： 用于向被测器件提供电流脉冲的脉冲电流发生器电路包括用于将电流施加到被测器件的电流源和用于从被测器件分流电流的受控电流分流器。 提供升压电路，用于当受控电流分流器断开并且电流再次流过被测器件时，向被测器件提供升压电流，从而有助于与被测器件相关联的寄生电容的再充电。

公开(公告)号：US06798228B2

公开(公告)日：2004-09-28

申请号：US10340102

申请日：2003-01-10

申请人： Peter Cuevas

发明人： Peter Cuevas

IPC分类号： G01R3102

CPC分类号： G01R1/0433

摘要： A test socket assembly for use in testing integrated circuits includes a spring holder plate having a plurality of holes for receiving a plurality of electrically conducting springs, and a plurality of electrically conducting springs in the plurality of holes. A test socket including a plurality of pins for receiving leads of an integrated circuit is mounted on the spring holder plate with the pins extending into the plurality of holes in the spring holder plate with each pin engaging a spring. The holder plate is positionable on a printed circuit board with the plurality of holes in the spring holder plate being in alignment with electrical contacts or pads on the printed circuit board, the plurality of springs electrically interconnecting the contacts and the plurality of pins.

摘要翻译： 用于测试集成电路的测试插座组件包括弹簧座板，弹簧座板具有用于容纳多个导电弹簧的多个孔和多个孔中的多个导电弹簧。 包括用于接收集成电路的引线的多个引脚的测试插座安装在弹簧保持板上，其中销延伸到弹簧保持板中的多个孔中，每个销与弹簧接合。 保持板可定位在印刷电路板上，弹簧保持板中的多个孔与印刷电路板上的电触点或焊盘对准，多个弹簧将触头和多个销电连接。

公开(公告)号：US20050206367A1

公开(公告)日：2005-09-22

申请号：US10868520

申请日：2004-06-14

申请人： Gedaliahoo Krieger ,  Peter Cuevas ,  James Borthwick

发明人： Gedaliahoo Krieger ,  Peter Cuevas ,  James Borthwick

IPC分类号： G01R1/00 ,  G01R19/00 ,  G01R19/165 ,  G01R31/26

CPC分类号： G01R19/16561 ,  G01R15/09 ,  G01R19/0092 ,  G01R19/1659 ,  G01R31/2608 ,  G01R31/2621

摘要： In an electrical for testing electrical current using a plurality of precision resistors connected in parallel or in series, a range finder for receiving the current to be measured with the voltage drop across the range finder being indicative of a current sub-range for measurement. In a preferred embodiment, a range finder comprises a first bipolar transistor and a second bipolar transistor connected in parallel and in opposite polarity with the emitter and base of each transistor connected together whereby each transistor functions as an emitter-base diode.

摘要翻译： 在用于使用并联或串联连接的多个精密电阻器来测试电流的电气中，用于接收待测电流的测距仪，其中测距仪上的电压降指示用于测量的当前子范围。 在优选实施例中，测距仪包括并联连接并且与连接在每个晶体管的发射极和基极相反的极性的第一双极晶体管和第二双极晶体管，由此每个晶体管用作发射极 - 基极二极管。

公开(公告)号：US20050194963A1

公开(公告)日：2005-09-08

申请号：US11071339

申请日：2005-03-02

申请人： Tal Raichman ,  Peter Cuevas ,  James Borthwick ,  Michael Casolo

发明人： Tal Raichman ,  Peter Cuevas ,  James Borthwick ,  Michael Casolo

IPC分类号： G01R1/00 ,  G01R31/00 ,  G01R31/319

CPC分类号： G01R31/31926

摘要： A dual channel source measurement unit for reliability testing of electrical devices provides a voltage stress stimulus to a device under test and monitors degradation to the device under test caused by the stress simulator. The dual channel source measurement unit decouples the stress and monitor portions of the unit so that the requirements of each can be optimized. Deglitching and current clamp switches can be incorporated in the dual channel source measurement unit to prevent glitches in the switching circuitry and to limit or clamp current flow to or from the monitor and stress sources.

摘要翻译： 用于电气设备的可靠性测试的双通道源测量单元为被测器件提供电压应力刺激，并监测由应力模拟器引起的被测器件的劣化。 双通道源测量单元解耦单元的应力和监视部分，以便可以优化每个单元的要求。 降压和电流钳位开关可以并入双通道源测量单元，以防止开关电路中的毛刺，并限制或夹紧来往或来自监视器和应力源的电流。