公开(公告)号：US5134247A

公开(公告)日：1992-07-28

申请号：US313395

申请日：1989-02-21

申请人： Peter J. Wehner ,  Paul M. Knudsen ,  David F. Leonard ,  Richard R. Steitz ,  David L. Duxstad ,  Melvin C. August ,  Delvin D. Eberlein

发明人： Peter J. Wehner ,  Paul M. Knudsen ,  David F. Leonard ,  Richard R. Steitz ,  David L. Duxstad ,  Melvin C. August ,  Delvin D. Eberlein

IPC分类号： H01L23/10 ,  H01L23/13 ,  H01L23/64

CPC分类号： H01L24/49 ,  H01L23/10 ,  H01L23/13 ,  H01L23/642 ,  H01L2224/48091 ,  H01L2224/4911 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011

摘要： A ceramic chip carrier package for integrated circuits is described which provides reduced interlead capacitance. A cavity for the placement of the integrated circuit chip is centrally located on a substrate. The leads of the package are bridged between the cavity and the outer periphery of the substrate. The leads are bonded to the substrate using adhesive glass placed on the substrate at the outer periphery of the cavity and at the outer periphery of the substrate. Sealing glass is placed on the outer periphery of the substrate over the leads to provide a bonding material for a lid to the package. The area between the cavity and the outer periphery of the substrate has no adhesive or sealing glass which thus provides an air dielectric between the leads so that interlead capacitance is reduced. In a second preferred embodiment, a channel is provided in the ceramic substrate between the periphery of the cavity and the periphery of the substrate to control the flow of adhesive glass and sealing glass so that the glasses do not migrate onto the leads. Since the air dielectric constant is lower than the glass dielectric constant, the interlead capacitance is lower than that found in prior art packages.

摘要翻译： 描述了用于集成电路的陶瓷芯片载体封装，其提供降低的交错电容。 用于放置集成电路芯片的空腔位于基板的中心。 封装的引线桥接在腔体和衬底的外周边之间。 引线使用位于空腔的外周和衬底的外周的位于衬底上的粘合剂玻璃粘合到衬底上。 将密封玻璃放置在引线上的基板的外周上，以提供用于封装的盖的接合材料。 空腔与衬底的外周之间的区域没有粘合剂或密封玻璃，因此在引线之间提供空气电介质，从而降低了交错电容。 在第二优选实施例中，在陶瓷基板中在空腔的周边和基板的周边之间设置通道，以控制粘合剂玻璃和密封玻璃的流动，使得玻璃不会迁移到引线上。 由于空气介电常数低于玻璃介电常数，所以交错电容比现有技术封装中低。