Method and apparatus for prefetching branch history information
    1.
    发明授权
    Method and apparatus for prefetching branch history information 失效
    用于预取分支历史信息的方法和装置

    公开(公告)号:US07493480B2

    公开(公告)日:2009-02-17

    申请号:US10197714

    申请日:2002-07-18

    IPC分类号: G06F9/00

    CPC分类号: G06F9/3806

    摘要: A two level branch history table (TLBHT) is substantially improved by providing a mechanism to prefetch entries from the very large second level branch history table (L2 BHT) into the active (very fast) first level branch history table (L1 BHT) before the processor uses them in the branch prediction process and at the same time prefetch cache misses into the instruction cache. The mechanism prefetches entries from the very large L2 BHT into the very fast L1 BHT before the processor uses them in the branch prediction process. A TLBHT is successful because it can prefetch branch entries into the L1 BHT sufficiently ahead of the time the entry is needed. This feature of the TLBHT is also used to prefetch instructions into the cache ahead of their use. In fact, the timeliness of the prefetches produced by the TLBHT can be used to remove most of the cycle time penalty incurred by cache misses.

    摘要翻译: 通过提供一种将超大型第二级分支历史表(L2 BHT)中的条目预取到活动(非常快)的第一级分支历史表(L1 BHT)中的条目之前,两级分支历史表(TLBHT)被大大改善 处理器在分支预测过程中使用它们,并且同时将高速缓存未命中预取到指令高速缓存中。 在处理器在分支预测过程中使用它们之前,该机制将从非常大的L2 BHT中将条目预取到非常快的L1 BHT中。 TLBHT是成功的,因为它可以在需要输入的时间之前将分支条目预取到L1 BHT中。 TLBHT的这个功能也用于在使用之前将指令预取到高速缓存中。 实际上,由TLBHT产生的预取的及时性可以用来消除高速缓存未命中引起的大部分周期时间损失。

    Branch history guided instruction/data prefetching
    8.
    发明授权
    Branch history guided instruction/data prefetching 失效
    分支历史指导/数据预取

    公开(公告)号:US06560693B1

    公开(公告)日:2003-05-06

    申请号:US09459739

    申请日:1999-12-10

    IPC分类号: G06F1500

    摘要: A mechanism is described that prefetches instructions and data into the cache using a branch instruction as a prefetch trigger. The prefetch is initiated if the predicted execution path after the branch instruction matches the previously seen execution path. This match of the execution paths is determined using a branch history queue that records the branch outcomes (taken/not taken) of the branches in the program. For each branch in this queue, a branch history mask records the outcomes of the next N branches and serves as an encoding of the execution path following the branch instruction. The branch instruction along with the mask is associated with a prefetch address (instruction or data address) and is used for triggering prefetches in the future when the branch is executed again. A mechanism is also described to improve the timeliness of a prefetch by suitably adjusting the value of N after observing the usefulness of the prefetched instructions or data.

    摘要翻译: 描述了使用分支指令作为预取触发器将指令和数据预取到高速缓存中的机制。 如果分支指令之后的预测执行路径与先前查看的执行路径匹配,则启动预取。 使用分支历史队列确定执行路径的这种匹配,该分支历史队列记录节目中分支的分支结果(已取/未采用)。 对于该队列中的每个分支,分支历史掩码记录下一个N个分支的结果,并且作为分支指令之后的执行路径的编码。 分支指令与掩码一起与预取地址(指令或数据地址)相关联,并且在再次执行分支时用于触发预取。 还描述了一种机制,以通过在观察到预取指令或数据的有用性之后适当地调整N的值来提高预取的及时性。

    Prefetching using future branch path information derived from branch prediction
    9.
    发明授权
    Prefetching using future branch path information derived from branch prediction 失效
    使用从分支预测得到的未来分支路径信息进行预取

    公开(公告)号:US07441110B1

    公开(公告)日:2008-10-21

    申请号:US09458883

    申请日:1999-12-10

    IPC分类号: G06F9/44 G06F9/45

    摘要: A mechanism is described that predicts the usefulness of a prefetching instruction during the instruction's decode cycle. Prefetching instructions that are predicted as useful (prefetch useful data) are sent to an execution unit of the processor for execution, while instructions that are predicted as not useful are discarded. The prediction regarding the usefulness of a prefetching instructions is performed utilizing a branch prediction mask contained in the branch history mechanism. This mask is compared to information contained in the prefetching instruction that records the branch path between the prefetching instruction and actual use of the data. Both instructions and data can be prefetched using this mechanism.

    摘要翻译: 描述了一种机制,其预测在指令的解码周期期间预取指令的有用性。 被预测为有用的预取指令(预取有用数据)被发送到处理器的执行单元用于执行,而被预测为无用的指令被丢弃。 使用包含在分支历史机制中的分支预测掩模来执行关于预取指令的有用性的预测。 将该掩码与包含在预取指令中的信息进行比较,该预取指令记录预取指令和数据的实际使用之间的分支路径。 可以使用这种机制来预取指令和数据。