DATA DECODING METHOD OF NON-VOLATILE MEMORY DEVICE AND APPARATUS FOR PERFORMING THE METHOD
    1.
    发明申请
    DATA DECODING METHOD OF NON-VOLATILE MEMORY DEVICE AND APPARATUS FOR PERFORMING THE METHOD 有权
    非易失性存储器件的数据解码方法及其实现方法

    公开(公告)号:US20150303948A1

    公开(公告)日:2015-10-22

    申请号:US14693446

    申请日:2015-04-22

    IPC分类号: H03M13/45 G11C29/52 G06F11/10

    摘要: A method of decoding data of a non-volatile memory device is provided. The method includes a first decoding operation of reading first hard decision data from the non-volatile memory device using a first hard decision read level and performing decoding using the first hard decision data; a second decoding operation of reading first soft decision data from the non-volatile memory device when the decoding fails in the first decoding operation, and performing decoding using the first soft decision; and a third decoding operation of changing from the first hard decision read level to a second hard decision read level when the decoding fails in the second decoding operation, reading second hard decision data using the second hard decision read level, and performing decoding either using the second hard decision data or using both the second hard decision data and the first soft decision data.

    摘要翻译: 提供一种解码非易失性存储器件的数据的方法。 该方法包括使用第一硬判决读取电平从非易失性存储器件读取第一硬判决数据并使用第一硬判决数据执行解码的第一解码操作; 第二解码操作,当在第一解码操作中解码失败时,从非易失性存储器件读取第一软判决数据,并且使用第一软判决执行解码; 以及第三解码操作,当第二解码操作中的解码失败时,从第一硬判决读取电平变为第二硬判决读取电平,使用第二硬判决读取电平读取第二硬判决数据,并且使用 第二硬判决数据或使用第二硬判决数据和第一软判决数据。

    DATA COMPRESSION DEVICES, OPERATING METHODS THEREOF, AND DATA PROCESSING APPARATUSES INCLUDING THE SAME
    2.
    发明申请
    DATA COMPRESSION DEVICES, OPERATING METHODS THEREOF, AND DATA PROCESSING APPARATUSES INCLUDING THE SAME 有权
    数据压缩装置,其操作方法和包括其的数据处理装置

    公开(公告)号:US20140152475A1

    公开(公告)日:2014-06-05

    申请号:US14173086

    申请日:2014-02-05

    IPC分类号: H03M7/30

    CPC分类号: H03M7/30 H03M7/6088

    摘要: A method of operating a data compression device includes analyzing data using an analyzer and generating a result of the analysis, while the data is buffered by an input buffer, and selectively compressing the buffered data according to the result of the analysis. A data compression device includes a data pattern analyzer configured to analyze data transmitted to an input buffer, and generate an analysis code based on the analysis of the data; and a data compression manager configured to selectively compress the data in the input buffer based on the analysis code.

    摘要翻译: 操作数据压缩装置的方法包括使用分析器分析数据并产生分析结果,同时数据由输入缓冲器缓冲,并根据分析结果选择性地压缩缓冲的数据。 数据压缩装置包括数据模式分析器,被配置为分析发送到输入缓冲器的数据,并且基于数据的分析生成分析代码; 以及数据压缩管理器,被配置为基于分析代码选择性地压缩输入缓冲器中的数据。

    NONVOLATILE MEMORY DEVICE AND RELATED PROGRAMMING METHOD
    4.
    发明申请
    NONVOLATILE MEMORY DEVICE AND RELATED PROGRAMMING METHOD 有权
    非易失性存储器件及相关编程方法

    公开(公告)号:US20100321999A1

    公开(公告)日:2010-12-23

    申请号:US12786724

    申请日:2010-05-25

    IPC分类号: G11C16/04

    摘要: A method of programming a nonvolatile memory device comprises programming memory cells connected to a first wordline, programming memory cells connected to a second wordline, programming memory cells connected to a third line between the first wordline and the second wordline, and adjusting a threshold voltage of the memory cells connected to the first wordline to compensate for interference generated by the programming of the memory cells connected to the third wordline.

    摘要翻译: 一种对非易失性存储器件进行编程的方法包括编程连接到第一字线的存储器单元,连接到第二字线的编程存储器单元,连接到第一字线和第二字线之间的第三线的编程存储器单元,以及调整阈值电压 连接到第一字线的存储器单元以补偿由连接到第三字线的存储器单元的编程所产生的干扰。

    MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
    6.
    发明申请
    MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME 审中-公开
    包括其的存储器件和存储器系统

    公开(公告)号:US20120290783A1

    公开(公告)日:2012-11-15

    申请号:US13467255

    申请日:2012-05-09

    IPC分类号: G06F12/00

    摘要: A memory device including a randomizer and a memory system including the memory device are provided. The memory device includes: a randomizer including a sequence generator which generates a first sequence from a seed and a converter which converts the first sequence into a second sequence in response to a conversion factor, the randomizer randomizing data to be programmed using the second sequence and outputting the randomized data; and a storage area which receives the randomized data from the randomizer and storing the randomized data.

    摘要翻译: 提供了包括随机化器和包括存储器件的存储器系统的存储器件。 存储装置包括:随机化器,其包括从种子生成第一序列的序列发生器和响应于转换因子将第一序列转换为第二序列的转换器,随机化器使用第二序列随机化要编程的数据,以及 输出随机数据; 以及存储区域,其从随机化器接收随机数据并存储随机数据。

    METHOD AND APPARATUS FOR MODIFYING DATA SEQUENCES STORED IN MEMORY DEVICE
    7.
    发明申请
    METHOD AND APPARATUS FOR MODIFYING DATA SEQUENCES STORED IN MEMORY DEVICE 审中-公开
    用于修改存储器件中存储的数据序列的方法和装置

    公开(公告)号:US20110040929A1

    公开(公告)日:2011-02-17

    申请号:US12796896

    申请日:2010-06-09

    IPC分类号: G06F12/02 G06F12/00

    CPC分类号: G06F11/10

    摘要: A method of modifying data sequences in a memory system comprises receiving program data having a first data sequence, and determining whether the received first data sequence matches one of “m” predefined sequences stored in the memory system. The method further comprises replacing the received first data sequence with a replacement sequence upon determining that the received first data sequence matches one of the “m” predefined sequences, and outputting the replacement sequence from the memory system. The replacement sequence typically comprises pattern bits indicating a pattern of the first data sequence and location bits indicating a start location of the first data sequence.

    摘要翻译: 一种在存储器系统中修改数据序列的方法包括:接收具有第一数据序列的程序数据,以及确定所接收的第一数据序列是否匹配存储在存储器系统中的“m”个预定序列之一。 该方法还包括在确定所接收的第一数据序列与“m”个预定义序列中的一个匹配并从存储器系统输出替换序列时,用替换序列替换所接收的第一数据序列。 替换序列通常包括指示第一数据序列的模式的模式比特和指示第一数据序列的开始位置的位置比特。

    DATA STORAGE SYSTEM AND DEVICE WITH RANDOMIZER/DE-RANDOMIZER
    8.
    发明申请
    DATA STORAGE SYSTEM AND DEVICE WITH RANDOMIZER/DE-RANDOMIZER 有权
    数据存储系统和带有RANDOMIZER / DE-RANDOMIZER的设备

    公开(公告)号:US20100088574A1

    公开(公告)日:2010-04-08

    申请号:US12573246

    申请日:2009-10-05

    IPC分类号: G06F11/10 G06F12/00

    CPC分类号: G06F11/1008

    摘要: A data storage device receives write data and includes a controller configured to determine a characteristic of the write data and provide a first control signal in response to the determined characteristic, a randomizer configured to selectively randomize or not randomize the write data in response to the first control signal to thereby generate randomized write data, and a data storage unit configured to store the randomized write data.

    摘要翻译: 数据存储装置接收写入数据,并且包括控制器,被配置为确定写入数据的特性并响应于所确定的特性提供第一控制信号;随机化器,被配置为响应于第一个数据,选择性地随机化或不使写入数据随机化 从而生成随机写入数据,以及数据存储单元,被配置为存储随机写入数据。

    MEMORY SYSTEM WITH ERROR CORRECTION DECODER ARCHITECTURE HAVING REDUCED LATENCY AND INCREASED THROUGHPUT
    9.
    发明申请
    MEMORY SYSTEM WITH ERROR CORRECTION DECODER ARCHITECTURE HAVING REDUCED LATENCY AND INCREASED THROUGHPUT 有权
    具有错误校正解码器结构的存储器系统具有减少的延迟和增加的延迟

    公开(公告)号:US20090070656A1

    公开(公告)日:2009-03-12

    申请号:US12191458

    申请日:2008-08-14

    IPC分类号: G11C29/04 G06F11/07

    摘要: A memory system includes: a memory controller including an error correction decoder. The error correction decoder includes: a demultiplexer adapted to receive data and demultiplex the data into a first set of data and a second set of data; first and second buffer memories for storing the first and second sets of data, respectively; an error detector; an error corrector; and a multiplexer adapted to multiplex the first set of data and the second set of data and to provide the multiplexed data to the error corrector. While the error corrector corrects errors in the first set of data, the error detector detects errors in the second set of data stored in the second buffer memory.

    摘要翻译: 存储器系统包括:包括纠错解码器的存储器控​​制器。 纠错解码器包括:解复用器,适于接收数据并将数据解复用为第一组数据和第二组数据; 用于分别存储第一和第二组数据的第一和第二缓冲存储器; 误差检测器; 误差校正器 以及多路复用器,其适于多路复用第一组数据和第二组数据,并将复用的数据提供给误差校正器。 当误差校正器校正第一组数据中的错误时,误差检测器检测存储在第二缓冲存储器中的第二组数据中的错误。

    Semiconductor Memory Systems that Include Data Randomizers and Related Devices, Controllers and Methods
    10.
    发明申请
    Semiconductor Memory Systems that Include Data Randomizers and Related Devices, Controllers and Methods 审中-公开
    包含数据随机器和相关器件,控制器和方法的半导体存储器系统

    公开(公告)号:US20120215963A1

    公开(公告)日:2012-08-23

    申请号:US13303512

    申请日:2011-11-23

    IPC分类号: G06F12/00 G06F12/02

    CPC分类号: G06F13/16 G11C7/1006

    摘要: A semiconductor memory system and a programming method performed by the same. The semiconductor memory system includes: a semiconductor memory device having a storage area; a memory controller for controlling programming and reading of the storage area of the semiconductor memory device; at least one first randomizer for changing program data to be programmed into the storage area to first random data by using a first sequence in a first period; and at least one second randomizer for changing the first random data to second random data by using a second sequence in a second period that is different from the first period.

    摘要翻译: 半导体存储器系统及其编程方法。 半导体存储器系统包括:具有存储区域的半导体存储器件; 用于控制半导体存储器件的存储区域的编程和读取的存储器控​​制器; 至少一个第一随机化器,用于通过在第一周期中使用第一序列来将要被编程到所述存储区域中的程序数据改变为第一随机数据; 以及至少一个第二随机化器,用于通过在与第一周期不同的第二周期中使用第二序列来将第一随机数据改变为第二随机数据。