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公开(公告)号:US20180259558A1
公开(公告)日:2018-09-13
申请号:US15975789
申请日:2018-05-10
发明人: Chih-Hui Yeh , Ming-Jyun Yu
IPC分类号: G01R23/02
CPC分类号: G01R23/02 , G01R31/2844 , G01R31/2879 , G01R31/31908 , G11C29/12015 , G11C29/14 , G11C29/50012 , G11C29/56012
摘要: A testing device includes a transfer interface, a tester, a first socket group and a second socket group. The first socket group includes a plurality of tested devices coupled in series and the second socket group includes a plurality of tested devices coupled in series. The tester is electrically connected to the socket group via the transfer interface. The transfer interface is configured to merge a first testing signal with a second testing signal to generate a double frequency testing signal. The double-frequency testing signal and a plurality of control signals are provided to the tested devices in the first socket group and the second socket group to perform the testing procedure on the tested devices of a same tested device pair simultaneously, and performing the testing procedure on the tested device pairs sequentially.
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公开(公告)号:US09998350B2
公开(公告)日:2018-06-12
申请号:US15298246
申请日:2016-10-20
发明人: Chih-Hui Yeh , Chih-Wei Lee
IPC分类号: H04L12/26 , H04B7/04 , H04B7/0413
CPC分类号: H04L43/50 , H04B7/0413
摘要: A testing device of high-frequency memory comprises a transfer interface, a tester and a socket group. The tester is electrically connected to the socket group via the transfer interface. The transfer interface is configured to merge a first testing signal with a second testing signal to generate a double frequency testing signal, wherein the first testing signal and the second testing signal are outputted by the tester, and through the transfer interface, the double frequency testing signal is shared and transmitted to the socket group for testing at least two memory packages disposed on the socket group.
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公开(公告)号:US20170118106A1
公开(公告)日:2017-04-27
申请号:US15298246
申请日:2016-10-20
发明人: Chih-Hui Yeh , Chih-Wei Lee
CPC分类号: H04L43/50 , H04B7/0413
摘要: A testing device of high-frequency memory comprises a transfer interface, a tester and a socket group. The tester is electrically connected to the socket group via the transfer interface. The transfer interface is configured to merge a first testing signal with a second testing signal to generate a double frequency testing signal, wherein the first testing signal and the second testing signal are outputted by the tester, and through the transfer interface, the double frequency testing signal is shared and transmitted to the socket group for testing at least two memory packages disposed on the socket group.
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公开(公告)号:US20190052489A1
公开(公告)日:2019-02-14
申请号:US15672289
申请日:2017-08-08
发明人: Chih-Hui Yeh , Ping-Che Lee , Fu-Hsiang Chang
摘要: The communication interface including a data encoder. The data encoder receives a data package which has at least one first output signal with N bits, generates and outputs at least one transmitting signal during one period of a reference clock signal and determining a voltage level of the transmitting signal according to a logic value of the first output signal, wherein N is an integer larger than 1.
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