公开(公告)号：US11410945B2

公开(公告)日：2022-08-09

申请号：US17094101

申请日：2020-11-10

申请人： Powertech Technology Inc.

发明人： Shih-Chun Chen ,  Sheng-Tou Tseng ,  Kun-Chi Hsu ,  Chin-Ta Wu ,  Ying-Lin Chen ,  Ting-Yeh Wu

IPC分类号： H01L23/66 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00 ,  H01L23/538 ,  H01L21/56 ,  H01Q1/22

摘要： A semiconductor package having a partial outer metal layer and packaging method thereof is disclosed. In the method, a specific packaging substrate or a specific positioning plate is used to package multiple semiconductor devices and a partial outer metal layer is quickly formed on an encapsulation of each semiconductor device in the same step.

公开(公告)号：US11367641B2

公开(公告)日：2022-06-21

申请号：US16867453

申请日：2020-05-05

申请人： Powertech Technology Inc.

发明人： Chin-Ta Wu ,  I-Lin Chan ,  Chi-Sheng Chang ,  Cheng-Hao Ciou

IPC分类号： H01L21/673

摘要： A wafer storage device includes a wafer cassette and a carrier plate. The wafer cassette includes a housing and a plurality pairs of retaining members disposed on lateral walls of the housing. The carrier plate is placed into the housing, is supported by one pair of the retaining members, and includes a plate body carrying the wafer thereon, and having a periphery formed with two slots extending respectively in two different radial directions of the wafer. Two positioning members respectively and radially correspond in position to the slots, and abut against an outer rim of the wafer.

公开(公告)号：US11587808B2

公开(公告)日：2023-02-21

申请号：US16998266

申请日：2020-08-20

申请人： Powertech Technology Inc.

发明人： Shih-Chun Chen ,  Sheng-Tou Tseng ,  Kun-Chi Hsu ,  Chin-Ta Wu ,  Ying-Lin Chen ,  Ting-Yeh Wu

IPC分类号： H01L21/673 ,  C23C14/56

摘要： A chip carrier device includes a frame, a chip support and a limiter. The chip support is disposed on the frame, and includes a supporting film for chips to be adhered thereto. A peripheral portion of the supporting film is attached to a surrounding frame part of the frame. A crossing portion of the supporting film passes through a center of the supporting film, and interconnects two opposite points of the peripheral portion. The supporting film is formed with through holes. The limiter includes a limiting part that interconnects two opposite points of the surrounding frame part, that is positioned corresponding to the crossing portion, and that is positioned on one side of the supporting film where the chips are to be arranged.

公开(公告)号：US11658046B2

公开(公告)日：2023-05-23

申请号：US17094537

申请日：2020-11-10

申请人： Powertech Technology Inc.

发明人： Shih-Chun Chen ,  Sheng-Tou Tseng ,  Kun-Chi Hsu ,  Chin-Ta Wu ,  Ting-Yeh Wu

IPC分类号： H01L23/552 ,  H01L21/56

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L23/552

摘要： Batch semiconductor packaging structures with back-deposited shielding layer and manufacturing method are provided. A grid having multiple frames is glued on an adhesive substrate. Multiple semiconductor devices respectively align with corresponding frames and are stuck on the adhesive substrate. Then a metal layer covers the semiconductor devices and the grid. A distance between four peripheries of a bottom of each semiconductor device and the corresponding frame is smaller than a distance between the bottom and the adhesive substrate, so that the a portion of the metal layer extended to the peripheries of the bottom is effectively reduced during forming the metal layer. After the semiconductor devices are picked up, no metal scrap is remined thereon. Therefore, the adhesive substrate does not need to form openings in advance and is reusable. The grid is also reusable so the manufacturing cost of the present invention is decreased.

公开(公告)号：US20190229064A1

公开(公告)日：2019-07-25

申请号：US15879305

申请日：2018-01-24

申请人： Powertech Technology Inc.

发明人： Chin-Ta Wu ,  Sheng-Tou Tseng ,  Kuo-Jhan Kao ,  Ying-Lin Chen ,  Cheng-Hung Song ,  Hung-Chieh Huang ,  Kun-Chi Hsu

IPC分类号： H01L23/544 ,  H01L21/3205 ,  H01L21/268 ,  H01L23/31 ,  H01L21/285 ,  H01L21/321 ,  H01L23/552

摘要： A laser color marking method for a semiconductor package has steps of: (a) providing a semiconductor element; (b) sputtering a metal layer on the semiconductor element; (c) obtaining a marking pattern; and (d) applying a laser light source on the marking region to form a mark according to the marking pattern. The mark is consisted of an optical oxide film converting ambient light to a corresponding color light, so a visible color mark is marked. Therefore, the present invention easily laser-marks the visible color mark on the semiconductor package.

公开(公告)号：US10388535B1

公开(公告)日：2019-08-20

申请号：US15989203

申请日：2018-05-25

申请人： POWERTECH TECHNOLOGY INC.

发明人： Chui-Liang Chiu ,  Kun-Chi Hsu ,  Jen-Tung Tseng ,  Chin-Ta Wu

IPC分类号： H01L21/00 ,  H01L21/304 ,  H01L21/687 ,  H01L21/683 ,  H01L21/67

摘要： A wafer processing method uses a chuck table with smaller diameter than a semiconductor wafer to be processed. A cut through edge trimming is therefore implemented on the periphery of the semiconductor wafer to form a cut through straight side at the periphery and also form a flat portion at the periphery as a positioning means for taping and backside grind processes.