公开(公告)号：US20190229064A1

公开(公告)日：2019-07-25

申请号：US15879305

申请日：2018-01-24

申请人： Powertech Technology Inc.

发明人： Chin-Ta Wu ,  Sheng-Tou Tseng ,  Kuo-Jhan Kao ,  Ying-Lin Chen ,  Cheng-Hung Song ,  Hung-Chieh Huang ,  Kun-Chi Hsu

IPC分类号： H01L23/544 ,  H01L21/3205 ,  H01L21/268 ,  H01L23/31 ,  H01L21/285 ,  H01L21/321 ,  H01L23/552

摘要： A laser color marking method for a semiconductor package has steps of: (a) providing a semiconductor element; (b) sputtering a metal layer on the semiconductor element; (c) obtaining a marking pattern; and (d) applying a laser light source on the marking region to form a mark according to the marking pattern. The mark is consisted of an optical oxide film converting ambient light to a corresponding color light, so a visible color mark is marked. Therefore, the present invention easily laser-marks the visible color mark on the semiconductor package.

公开(公告)号：US11587808B2

公开(公告)日：2023-02-21

申请号：US16998266

申请日：2020-08-20

申请人： Powertech Technology Inc.

发明人： Shih-Chun Chen ,  Sheng-Tou Tseng ,  Kun-Chi Hsu ,  Chin-Ta Wu ,  Ying-Lin Chen ,  Ting-Yeh Wu

IPC分类号： H01L21/673 ,  C23C14/56

摘要： A chip carrier device includes a frame, a chip support and a limiter. The chip support is disposed on the frame, and includes a supporting film for chips to be adhered thereto. A peripheral portion of the supporting film is attached to a surrounding frame part of the frame. A crossing portion of the supporting film passes through a center of the supporting film, and interconnects two opposite points of the peripheral portion. The supporting film is formed with through holes. The limiter includes a limiting part that interconnects two opposite points of the surrounding frame part, that is positioned corresponding to the crossing portion, and that is positioned on one side of the supporting film where the chips are to be arranged.

公开(公告)号：US11410945B2

公开(公告)日：2022-08-09

申请号：US17094101

申请日：2020-11-10

申请人： Powertech Technology Inc.

发明人： Shih-Chun Chen ,  Sheng-Tou Tseng ,  Kun-Chi Hsu ,  Chin-Ta Wu ,  Ying-Lin Chen ,  Ting-Yeh Wu

IPC分类号： H01L23/66 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00 ,  H01L23/538 ,  H01L21/56 ,  H01Q1/22

摘要： A semiconductor package having a partial outer metal layer and packaging method thereof is disclosed. In the method, a specific packaging substrate or a specific positioning plate is used to package multiple semiconductor devices and a partial outer metal layer is quickly formed on an encapsulation of each semiconductor device in the same step.

公开(公告)号：US09627228B1

公开(公告)日：2017-04-18

申请号：US15226930

申请日：2016-08-03

申请人： Powertech Technology Inc.

发明人： Shih-Chun Chen ,  Sheng-I Huang ,  Ying-Lin Chen ,  Ta-Hao Chang ,  I-Fong Wu ,  Chi-Chung Yu

IPC分类号： H01L21/56 ,  H01L23/552 ,  H01L23/00 ,  H01L21/48 ,  H01L21/78

CPC分类号： H01L21/78 ,  H01L21/4871 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/20 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/014

摘要： A method for manufacturing a chip package structure having a coating layer is provided. At least one chip package structure is mounted onto a terminal-protection film. The chip package structure has a top side, a back side opposite to the top side and a plurality of lateral sides. A plurality of terminals is disposed on the back side. The terminal-protection film at least partially seals the back side. A coating layer is formed over the top side, the lateral sides and a periphery region of the chip package structure, wherein the coating layer is not formed on the back side and the terminals. The terminal-protection film is debonded from the chip package structure.