VARIABLE LOW INTERMEDIATE FREQUENCY (VLIF) RADIO ARCHITECTURE

    公开(公告)号:US20250030442A1

    公开(公告)日:2025-01-23

    申请号:US18353201

    申请日:2023-07-17

    Abstract: A variable low intermediate frequency (VLIF), millimeter wave (mmW) communication system including a millimeter-wave (mmW) integrated circuit (mmw-IC) having a receive section having a receive radio frequency (RF) conversion stage and a receive variable intermediate frequency (IF) conversion stage, the receive RF conversion stage configured to convert a receive communication signal between RF and a first receive IF; the receive variable IF conversion stage configured to convert the first receive IF signal to a first variable low IF signal, and a transmit section having a transmit variable IF conversion stage and a transmit RF conversion stage, the transmit variable IF conversion stage configured to convert a second variable low IF signal to a second IF signal, the transmit RF conversion stage configured to convert the second IF signal to an RF signal for transmission.

    AMPLIFIER WITH SWITCHABLE TRANSFORMER

    公开(公告)号:US20220231642A1

    公开(公告)日:2022-07-21

    申请号:US17647534

    申请日:2022-01-10

    Abstract: In certain aspects, an apparatus includes a first amplifier having a first output and a second output, and a transformer. The transformer includes a first switchable inductor coupled between the first output and the second output, a first capacitor coupled in parallel with the first switchable inductor, a second switchable inductor magnetically coupled to the first switchable inductor, a second capacitor coupled in parallel with the second switchable inductor, a third switchable inductor magnetically coupled to the first switchable inductor, and a third capacitor coupled in parallel with the third switchable inductor.

    SHARED PHASE SHIFTER RADIO ARCHITECTURE

    公开(公告)号:US20240429906A1

    公开(公告)日:2024-12-26

    申请号:US18340239

    申请日:2023-06-23

    Abstract: A phase shifter for a millimeter wave (mmW) communication system including an in phase variable gain amplifier (I VGA) and a quadrature VGA (Q VGA) configured to receive radio frequency (RF) signals, the I VGA and the Q VGA configured to provide a selectable output to primary sides of first and second electromagnetic (EM) elements, respectively, the first EM element configured to provide a single-ended I output and the second EM element configured to provide a single-ended Q output, and a hybrid quadrature generator (HQG) configured to receive the single-ended I output of the first EM element and the single-ended Q output of the second EM element, the HQG configured to provide a combined signal at a desired phase.

    DOHERTY TRANSCEIVER INTERFACE
    9.
    发明申请

    公开(公告)号:US20230091253A1

    公开(公告)日:2023-03-23

    申请号:US17481559

    申请日:2021-09-22

    Abstract: A transceiver interface for a phased array element includes a first magnetic circuit having a primary coil and a secondary coil, a second magnetic circuit having a primary coil, a secondary coil and a tertiary coil, a main amplifier path and an auxiliary amplifier path, the main amplifier path coupled to the primary coil of the second magnetic circuit and configured to receive a quadrature signal, the main amplifier path configured to provide a quadrature output signal, the auxiliary amplifier path coupled to the primary coil of the first magnetic circuit and configured to receive an in-phase signal, the auxiliary amplifier path configured to provide an in-phase output signal, a selectable output circuit configured to selectively combine the in-phase output signal and the quadrature output signal, and a low noise amplifier (LNA) coupled to the tertiary coil of the second magnetic circuit.

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