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    DEVICE AND METHOD FOR COMPUTING A CHANNEL ESTIMATE
    1.
    发明申请
    DEVICE AND METHOD FOR COMPUTING A CHANNEL ESTIMATE 有权
    用于计算通道估计的装置和方法

    公开(公告)号：US20140270017A1

    公开(公告)日：2014-09-18

    申请号：US13842663

    申请日：2013-03-15

    申请人： QUALCOMM INCORPORATED

    发明人： Deepak Mathew ,  Ajay Anant Ingle ,  Mao Zeng ,  Marc M. Hoffman

    IPC分类号： H04L25/02

    CPC分类号： H04L25/0212 ,  H04B1/70752 ,  H04B1/7093 ,  H04B2201/70707

    摘要： An apparatus includes selection logic configured to select a first subset of a first set of samples stored at a first set of registers. The first subset includes a first sample stored at a first register of the first set of registers and further includes a second sample stored at a second register of the first set of registers. The apparatus further includes shift logic configured to shift a second set of samples stored at a second set of registers. The apparatus further includes a channel estimator configured to generate a first value associated with a channel estimate based on the first subset and further based on a second subset of the shifted second set of samples.

    摘要翻译： 一种装置包括选择逻辑，其被配置为选择存储在第一组寄存器中的第一组采样的第一子集。 第一子集包括存储在第一组寄存器的第一寄存器中的第一样本，并且还包括存储在第一组寄存器的第二寄存器上的第二样本。 该装置还包括移位逻辑，配置成移位存储在第二组寄存器中的第二组采样。 该装置还包括信道估计器，其被配置为基于第一子集生成与信道估计相关联的第一值，并且还基于所移位的第二组样本的第二子集。

    DEDICATED ARITHMETIC ENCODING INSTRUCTION
    2.
    发明申请
    DEDICATED ARITHMETIC ENCODING INSTRUCTION 有权
    专用算术编码指令

    公开(公告)号：US20150349796A1

    公开(公告)日：2015-12-03

    申请号：US14288018

    申请日：2014-05-27

    申请人： QUALCOMM Incorporated

    发明人： Bo Zhou ,  Mao Zeng ,  Erich James Plondke ,  Lucian Codrescu ,  Shu Xiao ,  Junchen Du ,  Suhail Jalil

    IPC分类号： H03M7/40

    CPC分类号： H03M7/4018 ,  G06F9/30018 ,  G06F9/30025 ,  G06F9/3895 ,  H04N19/13 ,  H04N19/42 ,  H04N19/91

    摘要： A method includes executing, at a processor, a dedicated arithmetic encoding instruction. The dedicated arithmetic encoding instruction accepts a plurality of inputs including a first range, a first offset, and a first state and produces one or more outputs based on the plurality of inputs. The method also includes storing a second state, realigning the first range to produce a second range, and realigning the first offset to produce a second offset based on the one or more outputs of the dedicated arithmetic encoding instruction.

    摘要翻译： 一种方法包括在处理器处执行专用算术编码指令。 专用算术编码指令接受包括第一范围，第一偏移和第一状态的多个输入，并且基于多个输入产生一个或多个输出。 该方法还包括存储第二状态，重新对准第一范围以产生第二范围，以及基于专用算术编码指令的一个或多个输出来重新对准第一偏移以产生第二偏移。

    INCREASING CANNY FILTER IMPLEMENTATION SPEED
    4.
    发明申请
    INCREASING CANNY FILTER IMPLEMENTATION SPEED 有权
    增加CANNY滤波器的实现速度

    公开(公告)号：US20150317532A1

    公开(公告)日：2015-11-05

    申请号：US14269380

    申请日：2014-05-05

    申请人： QUALCOMM Incorporated

    发明人： Kim-Chyan Gan ,  Mao Zeng ,  Lucian Codrescu

    IPC分类号： G06K9/46 ,  G06T1/20

    CPC分类号： G06K9/46 ,  G06K9/4604 ,  G06K9/4609 ,  G06T1/20

    摘要： A method includes receiving image data and performing a non-maximum suppression (NMS) operation on the image data. The method also includes initiating an edge tracking by hysteresis (ETH) operation on a portion of the image data prior to completion of the NMS operation.

    摘要翻译： 一种方法包括接收图像数据并对图像数据执行非最大抑制（NMS）操作。 该方法还包括在完成NMS操作之前通过对图像数据的一部分的滞后（ETH）操作来启动边缘跟踪。

    System and method of feature descriptor processing
    5.
    发明授权
    System and method of feature descriptor processing 有权

    公开(公告)号：US10706316B2

    公开(公告)日：2020-07-07

    申请号：US16144331

    申请日：2018-09-27

    申请人： QUALCOMM Incorporated

    发明人： Kim-Chyan Gan ,  Mao Zeng ,  Erich Plondke

    IPC分类号： G06K9/46 ,  G06K9/62 ,  G06K9/32 ,  G06T1/20 ,  G06K9/00

    摘要： A method of generating a feature descriptor includes determining a first output histogram of an input by processing a first group of pixels of the input to determine first contributions to bins of the first output histogram. The input image including gradient orientation values and gradient magnitude values of a portion of an image that is in a region of a detected feature. After processing the first group of pixels, the method includes determining a second output histogram of the input by processing a second group of pixels of the input to determine second contributions to bins of the second output histogram.

    Dedicated arithmetic encoding instruction
    7.
    发明授权
    Dedicated arithmetic encoding instruction 有权
    专用算术编码指令

    公开(公告)号：US09455743B2

    公开(公告)日：2016-09-27

    申请号：US14288018

    申请日：2014-05-27

    申请人： QUALCOMM Incorporated

    发明人： Bo Zhou ,  Mao Zeng ,  Erich James Plondke ,  Lucian Codrescu ,  Shu Xiao ,  Junchen Du ,  Suhail Jalil

    IPC分类号： H03M7/00 ,  H03M7/40 ,  G06F9/30 ,  G06F9/38 ,  H04N19/91 ,  H04N19/13

    CPC分类号： H03M7/4018 ,  G06F9/30018 ,  G06F9/30025 ,  G06F9/3895 ,  H04N19/13 ,  H04N19/42 ,  H04N19/91

    摘要： A method includes executing, at a processor, a dedicated arithmetic encoding instruction. The dedicated arithmetic encoding instruction accepts a plurality of inputs including a first range, a first offset, and a first state and produces one or more outputs based on the plurality of inputs. The method also includes storing a second state, realigning the first range to produce a second range, and realigning the first offset to produce a second offset based on the one or more outputs of the dedicated arithmetic encoding instruction.

    摘要翻译： 一种方法包括在处理器处执行专用算术编码指令。 专用算术编码指令接受包括第一范围，第一偏移和第一状态的多个输入，并且基于多个输入产生一个或多个输出。 该方法还包括存储第二状态，重新对准第一范围以产生第二范围，以及基于专用算术编码指令的一个或多个输出来重新对准第一偏移以产生第二偏移。

    Device and method for computing a channel estimate
    8.
    发明授权
    Device and method for computing a channel estimate 有权
    用于计算信道估计的装置和方法

    公开(公告)号：US09130786B2

    公开(公告)日：2015-09-08

    申请号：US13842663

    申请日：2013-03-15

    申请人： QUALCOMM Incorporated

    发明人： Deepak Mathew ,  Ajay Anant Ingle ,  Mao Zeng ,  Marc M. Hoffman

    IPC分类号： H04B1/00 ,  H04L27/00 ,  H04L25/02 ,  H04B1/7075 ,  H04B1/7093

    CPC分类号： H04L25/0212 ,  H04B1/70752 ,  H04B1/7093 ,  H04B2201/70707

    摘要： An apparatus includes selection logic configured to select a first subset of a first set of samples stored at a first set of registers. The first subset includes a first sample stored at a first register of the first set of registers and further includes a second sample stored at a second register of the first set of registers. The apparatus further includes shift logic configured to shift a second set of samples stored at a second set of registers. The apparatus further includes a channel estimator configured to generate a first value associated with a channel estimate based on the first subset and further based on a second subset of the shifted second set of samples.

    摘要翻译： 一种装置包括选择逻辑，其被配置为选择存储在第一组寄存器中的第一组采样的第一子集。 第一子集包括存储在第一组寄存器的第一寄存器中的第一样本，并且还包括存储在第一组寄存器的第二寄存器上的第二样本。 该装置还包括移位逻辑，配置成移位存储在第二组寄存器中的第二组采样。 该装置还包括信道估计器，其被配置为基于第一子集生成与信道估计相关联的第一值，并且还基于所移位的第二组样本的第二子集。

    VECTOR ARITHMETIC REDUCTION
    9.
    发明申请
    VECTOR ARITHMETIC REDUCTION 审中-公开
    矢量算术减少

    公开(公告)号：US20150052330A1

    公开(公告)日：2015-02-19

    申请号：US13967191

    申请日：2013-08-14

    申请人： QUALCOMM Incorporated

    发明人： Ajay Anant Ingle ,  Marc Murray Hoffman ,  Deepak Mathew ,  Mao Zeng

    IPC分类号： G06F9/30

    CPC分类号： G06F9/3001 ,  G06F9/30036 ,  G06F9/3887 ,  G06F9/3897

    摘要： In a particular embodiment, a method includes executing a vector instruction at a processor. The vector instruction includes a vector input that includes a plurality of elements. Executing the vector instruction includes providing a first element of the plurality of elements as a first output. Executing the vector instruction further includes performing an arithmetic operation on the first element and a second element of the plurality of elements to provide a second output. Executing the vector instruction further includes storing the first output and the second output in an output vector.

    摘要翻译： 在特定实施例中，一种方法包括在处理器处执行向量指令。 矢量指令包括包括多个元素的矢量输入。 执行向量指令包括提供多个元素中的第一元素作为第一输出。 执行向量指令还包括对第一元素和多个元素的第二元素执行算术运算以提供第二输出。 执行向量指令还包括将第一输出和第二输出存储在输出向量中。