公开(公告)号：US10713189B2

公开(公告)日：2020-07-14

申请号：US15634701

申请日：2017-06-27

Applicant: QUALCOMM INCORPORATED

Inventor： Vasantha Kumar Bandur Puttappa ,  Umesh Rao ,  Kunal Desai

IPC: G06F11/30 ,  G06F13/16 ,  H04B1/3827 ,  G06F15/78 ,  G06F5/06 ,  G06F1/32

Abstract: Methods and systems for dynamically controlling buffer size in a computing device in a computing device (“PCD”) are disclosed. A monitor module determines a first use case for defining a first activity level for a plurality of components of the PCD. Based on the first use case, a plurality of buffers are set to a first buffer size. Each of the buffers is associated with one of the plurality of components, and the first buffer size for each buffer is based on the first activity level of the associated component. A second use case for the PCD, different from the first use case, is determined. The second use case defines a second activity level for the plurality of components. At least one of the buffers is set to a second buffer size different from the first buffer size based on the second use case.

公开(公告)号：US12106793B2

公开(公告)日：2024-10-01

申请号：US18081442

申请日：2022-12-14

Applicant: QUALCOMM Incorporated

Inventor： Saurabh Sethi ,  Madhukar Reddy N ,  Vasantha Kumar Bandur Puttappa ,  Amulya Srinivasan Margasahayam

IPC: G11C11/40 ,  G11C11/406 ,  G11C11/4093

CPC classification number: G11C11/40618 ,  G11C11/40615 ,  G11C11/4093

Abstract: Aspects of the present disclosure are directed to techniques and procedures for reducing memory (e.g., DRAM) access latency (e.g., read latency, write latency) due to memory refreshes. In some aspects, a memory refresh scheduling algorithm can take into account of memory access batching (e.g., read batch, write batch). In some aspects, a refresh scheduling algorithm can schedule more or prioritize refreshes to occur during a write batch to reduce memory read access latency because fewer refreshes are scheduled during memory read access. The techniques can be adapted to reduce write latency.

公开(公告)号：US20180373652A1

公开(公告)日：2018-12-27

申请号：US15634701

申请日：2017-06-27

Applicant: QUALCOMM INCORPORATED

Inventor： Vasantha Kumar Bandur Puttappa ,  Umesh Rao ,  Kunal Desai

IPC: G06F13/16 ,  H04B1/3827 ,  G06F15/78 ,  G06F11/30

Abstract: Methods and systems for dynamically controlling buffer size in a computing device in a computing device (“PCD”) are disclosed. A monitor module determines a first use case for defining a first activity level for a plurality of components of the PCD. Based on the first use case, a plurality of buffers are set to a fist buffer size. Each of the buffers is associated with one of the plurality of components, and the first buffer size for each buffer is based on the first activity level of the associated component. A second use case for the PCD, different from the first use case, is determined. The second use case defines a second activity level for the plurality of components. At least one of the buffers is set to a second buffer size different from the first buffer size based on the second use case.