公开(公告)号：US20240249056A1

公开(公告)日：2024-07-25

申请号：US18156999

申请日：2023-01-19

申请人： QUALCOMM Incorporated

发明人： Hyeokjin LIM ,  Ankur MEHROTRA ,  Renukprasad HIREMATH ,  Foua VANG ,  Manjanaika CHANDRANAIKA ,  Akhtar ALAM ,  Kamesh MEDISETTI ,  Seung Hyuk KANG ,  Venugopal BOYNAPALLI

IPC分类号： G06F30/392 ,  H01L21/768 ,  H01L23/48 ,  H01L23/498 ,  H01L23/528 ,  H01L27/02

CPC分类号： G06F30/392 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/5286 ,  H01L27/0207

摘要： A chip includes a spare cell including a first active region, and a first gate extending over the first active region in a first direction. The chip also includes a tie cell including a second active region, a second gate extending over the second active region in the first direction, a first drain contact formed over the second active region, a first source contact formed over the second active region, wherein the second gate is between the first drain contact and the first source contact, and first source contact is coupled to a first rail, and a circuit configured to couple the second gate to a second rail. The chip also includes a metal routing extending in a second direction, wherein the second direction is perpendicular to the first direction, and the first metal routing is coupled to the first drain contact and the first gate.