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公开(公告)号：US20240037840A1
公开(公告)日：2024-02-01
申请号：US17816375
申请日：2022-07-29
Applicant: QUALCOMM Incorporated
Inventor： Adimulam RAMESH BABU , Srihari Babu ALLA , Avinash SEETHARAMAIAH , Jonnala Gadda NAGENDRA KUMAR , David Kirk MCALLISTER
CPC classification number: G06T15/06 , G06T15/08 , G06T17/005 , G06T17/10
Abstract: Systems and techniques are provided for widening a hierarchical structure for ray tracing. For instance, a process can include obtaining a plurality of primitives of a scene object included in a first hierarchical acceleration data structure and determining one or more candidate hierarchical acceleration data structures each including the plurality of primitives. A cost metric can be determined for the one or more candidate hierarchical acceleration data structures and, based on the cost metric, a compressibility prediction associated with a candidate hierarchical acceleration data structure of the one or more candidate hierarchical acceleration data structures can be determined. An output hierarchical acceleration data structure can be generated based on the compressibility prediction.
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公开(公告)号：US20240070964A1
公开(公告)日：2024-02-29
申请号：US17823948
申请日：2022-08-31
Applicant: QUALCOMM Incorporated
Inventor： Adimulam RAMESH BABU , Srihari Babu ALLA , Avinash SEETHARAMAIAH , Jonnala Gadda NAGENDRA KUMAR
CPC classification number: G06T15/06 , G06T1/20 , G06T1/60 , G06T17/005 , G06T2210/12
Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may obtain an indication of a BVH structure including a plurality of nodes, wherein the BVH structure is associated with geometry data for a plurality of primitives in a scene, wherein each of the plurality of nodes is associated with one or more primitives, where a first level BVH includes a set of first nodes and a second level BVH includes a set of second nodes. The apparatus may also allocate information for a plurality of second nodes in the set of second nodes to at least one first node in the set of first nodes. Further, the apparatus may store the allocated information for the plurality of second nodes in the set of second nodes in the at least one first node in the set of first nodes.
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公开(公告)号：US20250022204A1
公开(公告)日：2025-01-16
申请号：US18351460
申请日：2023-07-12
Applicant: QUALCOMM Incorporated
Inventor： Adimulam RAMESH BABU , Srihari Babu ALLA , Alfredo Olegario SAUCEDO , Avinash SEETHARAMAIAH , Jonnala Gadda NAGENDRA KUMAR
Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for adaptive BVH rebuilds with biased cost functions for dynamic geometry. A graphics processor may obtain an indication of first BVH structure(s) including first nodes, where the first BVH structure(s) are representative of first geometry data for first primitives in first frame(s), where each of the first nodes is associated with first primitive(s), may detect a number of rays that intersect each of the first BVH structure(s) from direction(s) associated with the first frame(s), may update a cost function based on the number of rays and each of the direction(s), and may configure, based on the updated cost function, second BVH structure(s) including second nodes, where the second BVH structure(s) are representative of second geometry data for second primitives in second frame(s), where each of the second nodes is associated with second primitive(s).
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公开(公告)号：US20230343016A1
公开(公告)日：2023-10-26
申请号：US18245847
申请日：2020-11-18
Applicant: QUALCOMM Incorporated
Inventor： Srihari Babu ALLA , Jonnala Gadda NAGENDRA KUMAR , Avinash SEETHARAMAIAH , Andrew Evan GRUBER , Thomas Edwin FRISINGER , Richard HAMMERSTONE , Bo DU , Yongjun XU
IPC: G06T15/00
CPC classification number: G06T15/005
Abstract: The present disclosure relates to graphics processing. An apparatus of the present disclosure may determine visibility streams corresponding to a target and a set of bins into which the target is divided. The apparatus may select one of a first rendering mode or a second rendering mode for the target based on the first visibility stream and based on the set of second visibility streams. When the first rendering mode is select, the apparatus may configure each of the set of bins into a first subset associated with a first type of rendering pass or a second subset associated with a second type of rendering pass. The apparatus may then render the target based on the selected one of the first rendering mode or the second rendering mode and, if applicable, based on the first rendering pass type or the second rendering pass type.
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公开(公告)号：US20240046543A1
公开(公告)日：2024-02-08
申请号：US17817815
申请日：2022-08-05
Applicant: QUALCOMM Incorporated
Inventor： Yun DU , Eric DEMERS , Andrew Evan GRUBER , Chun YU , Baoguang YANG , Chihong ZHANG , Yuehai DU , Avinash SEETHARAMAIAH , Jonnala Gadda NAGENDRA KUMAR , Gang ZHONG , Zilin YING , Fei WEI
CPC classification number: G06T15/005 , G06T15/80
Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for runtime optimization of the shader execution flow. A graphics processor may obtain instruction execution data associated with a graphics workload, the instruction execution data including graphics data for a set of shader operations. The graphics processor may configure, at a first iteration, at least one predication value based on the instruction execution data including the graphics data for the set of shader operations. The graphics processor may adjust, at a second iteration, an execution flow of the graphics workload based on the configured at least one predication value, the execution flow of the graphics workload including the set of shader operations. The graphics processor may execute or refrain from executing, at the second iteration, each of the set of shader operations based on the adjusted execution flow of the graphics workload.
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Patent Agency Ranking
公开(公告)号：US20220114284A1
公开(公告)日：2022-04-14
申请号：US17070734
申请日：2020-10-14
Applicant: QUALCOMM Incorporated
Inventor： Avinash SEETHARAMAIAH , Murat BALCI , Jonnala Gadda NAGENDRA KUMAR , Nigel POOLE , Abhiraj DESHPANDE
Abstract: Systems, methods, and computer-readable media are provided for signing and executing graphics processing unit (GPU) commands. In some examples, a method can include receiving, by a GPU, one or more commands including one or more verification signatures generated using a processor, each verification signature of the one or more verification signatures including a first value generated based on the one or more commands; generating, by the GPU, one or more additional verification signatures associated with the one or more commands, wherein each verification signature of the one or more additional verification signatures includes a second value generated by the GPU based on the one or more commands; and determining, by the GPU, a validity of the one or more commands based on a comparison of the one or more verification signatures and the one or more additional verification signatures.
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公开(公告)号：US20230377240A1
公开(公告)日：2023-11-23
申请号：US17664033
申请日：2022-05-18
Applicant: QUALCOMM Incorporated
Inventor： Yun DU , Eric DEMERS , Andrew Evan GRUBER , Chun YU , Chihong ZHANG , Baoguang YANG , Yuehai DU , Gang ZHONG , Avinash SEETHARAMAIAH , Jonnala Gadda NAGENDRA KUMAR
CPC classification number: G06T15/005 , G06T1/60
Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may receive a set of draw call instructions corresponding to a graphics workload, where the set of draw call instructions is associated with at least one run-time parameter. The apparatus may also obtain a first shader program associated with storing data in a system memory and at least one second shader program associated with storing data in a constant memory. Further, the apparatus may execute the first shader program or the at least one second shader program based on whether the at least one run-time parameter is less than or equal to a size of the constant memory. The apparatus may also update or maintain a configuration of a shader processor or a streaming processor based on executing the first shader program or the at least one second shader program.
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公开(公告)号：US20230086288A1
公开(公告)日：2023-03-23
申请号：US17482296
申请日：2021-09-22
Applicant: QUALCOMM Incorporated
Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may perform a color analysis on at least one first frame of a plurality of frames, the color analysis being performed based on at least one image in the at least one first frame. The apparatus may also generate a frequency map for at least one second frame of the plurality of frames based on the performed color analysis. Further, the apparatus may render the at least one second frame based on the frequency map for the at least one second frame, the at least one second frame being rendered after the at least one first frame.
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公开(公告)号：US20220101479A1
公开(公告)日：2022-03-31
申请号：US17039873
申请日：2020-09-30
Applicant: QUALCOMM Incorporated
Inventor： Srihari Babu ALLA , Jonnala Gadda NAGENDRA KUMAR , Avinash SEETHARAMAIAH , Andrew Evan GRUBER , Richard HAMMERSTONE , Thomas Edwin FRISINGER , Daniel ARCHARD
Abstract: The present disclosure relates to methods and apparatus for hybrid rendering of video/graphics content by a graphics processing unit. The apparatus can configure the graphics processing unit of a display apparatus to perform multiple rendering passes for a frame of a scene to be displayed on a display device. Moreover, the apparatus can control the graphics processing unit to perform a first rendering pass of the multiple rendering passes to generate a first render target that is stored in either an on-chip graphics memory of the GPU or a system of the display apparatus. The apparatus can also control the graphics processing unit to perform a second rendering pass to generate a second render target that is alternatively stored in the system memory of the display apparatus or on-chip graphics memory of the GPU.
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公开(公告)号：US20210158470A1
公开(公告)日：2021-05-27
申请号：US16694956
申请日：2019-11-25
Applicant: QUALCOMM Incorporated
Abstract: The present disclosure relates to methods and apparatus for graphics processing. Aspects of the present disclosure can determine a state for each graphics state group of a plurality of graphics state groups. Further, aspects of the present disclosure can determine whether at least one graphics state group of the plurality of graphics state groups includes a changed state. Additionally, aspects of the present disclosure can communicate state information for the at least one graphics state group when the at least one graphics state group includes a changed state. In some aspects, the state information includes information regarding the state of the at least one graphics state group. Aspects of the present disclosure can also configure a draw state for the plurality of graphics state groups, where the draw state includes state information for each of the graphics state groups.
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