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公开(公告)号：US20220131013A1
公开(公告)日：2022-04-28
申请号：US17077807
申请日：2020-10-22
Applicant: QUALCOMM Incorporated
Inventor： Chenjie TANG , Gengming TAO , Ye LU , Bin YANG , Xia LI
IPC: H01L29/786 , H01L29/06 , H01L29/205 , H01L29/423 , H01L21/02 , H01L29/66
Abstract: Certain aspects of the present disclosure generally relate to a semiconductor device implemented with multiple channels in a gate-all-around (GAA) high-electron-mobility transistor (HEMT) and techniques for fabricating such a device. One example semiconductor device generally includes a substrate; a first gate layer disposed above the substrate; a first barrier layer disposed above the first gate layer; a first channel region disposed above the first barrier layer; a second barrier layer disposed above the first channel region; a second gate layer disposed above the second barrier layer; a third barrier layer disposed above the second gate layer; a second channel region disposed above the third barrier layer; a fourth barrier layer disposed above the second channel region; a source region; and a drain region.
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公开(公告)号：US20210098533A1
公开(公告)日：2021-04-01
申请号：US16585216
申请日：2019-09-27
Applicant: QUALCOMM Incorporated
Inventor： Bin YANG , Xia LI , Gengming TAO
Abstract: Certain aspects of the present disclosure generally relate to a vertical resistive random access memory (RRAM). The vertical RRAM generally includes a planar substrate layer and a plurality of fin-like metal-insulator-metal (MIM) structures extending orthogonally above the substrate layer.
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公开(公告)号：US20210036222A1
公开(公告)日：2021-02-04
申请号：US16524639
申请日：2019-07-29
Applicant: QUALCOMM Incorporated
Inventor： Xia LI , Bin YANG , Gengming TAO
Abstract: Certain aspects of the present disclosure are directed to a resistive random access memory (RRAM). The RRAM generally includes a substrate, an insulator region disposed above the substrate, and a gate region disposed adjacent to at least one lateral surface of the insulator region. The RRAM may also include a first non-insulative region disposed adjacent to a lower surface of the insulator region, and a second non-insulative region disposed adjacent to an upper surface of the insulator region.
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公开(公告)号：US20190386154A1
公开(公告)日：2019-12-19
申请号：US16007575
申请日：2018-06-13
Applicant: QUALCOMM Incorporated
Inventor： Gengming TAO , Xia LI , Bin YANG , Qingqing LIANG , Francesco CAROBOLANTE
Abstract: A variable capacitor includes a mesa on a substrate. The mesa has multiple III-V semiconductor layers and includes a first side and a second side opposite the first side. The first side has a first sloped portion and a first horizontal portion. The second side has a second sloped portion and a second horizontal portion. A control terminal is on a third side of the mesa. A first terminal is on the first side of the mesa. The first terminal is disposed on the first horizontal portion and the first sloped portion. A second terminal is also on the substrate.
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公开(公告)号：US20180240898A1
公开(公告)日：2018-08-23
申请号：US15614471
申请日：2017-06-05
Applicant: QUALCOMM Incorporated
Inventor： Gengming TAO , Bin YANG , Xia LI , Miguel MIRANDA CORBALAN
IPC: H01L29/737 , H01L29/08 , H01L29/10 , H01L29/66 , H01L29/06
CPC classification number: H01L29/7371 , H01L29/0696 , H01L29/0813 , H01L29/0817 , H01L29/1004 , H01L29/42304 , H01L29/66242
Abstract: A heterojunction bipolar transistor unit cell may include a compound semiconductor substrate. The heterojunction bipolar transistor unity may also include a base mesa on the compound semiconductor substrate. The base mesa may include a collector region on the compound semiconductor substrate and a base region on the collector region. The heterojunction bipolar transistor unity may further include a single emitter mesa on the base mesa.
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公开(公告)号：US20200328293A1
公开(公告)日：2020-10-15
申请号：US16379904
申请日：2019-04-10
Applicant: QUALCOMM Incorporated
Inventor： Gengming TAO , Bin YANG , Xia LI
IPC: H01L29/737 , H01L29/66 , H01L29/40 , H03F3/19
Abstract: Aspects generally relate to a heterojunction bipolar transistor (HBT), and method of manufacturing the same. The HBT including an emitter a first, a first side of a base coupled to a second side of the emitter opposite the first side of the emitter. A collector coupled to the base on a second side of the base opposite the emitter, wherein an area of a junction between the base and the collector is less than or equal to an area of a junction between the base and the emitter. A dielectric coupled to the collector. A first conductive base contact coupled to the base and adjacent to the collector and extending over a base-collector junction, the conductive base contact operative as a field plate.
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7.发明申请
公开(公告)号：US20200185384A1
公开(公告)日：2020-06-11
申请号：US16216883
申请日：2018-12-11
Applicant: QUALCOMM Incorporated
Inventor： Xia LI , Bin YANG , Gengming TAO
IPC: H01L27/092 , H01L29/78 , H01L29/08 , H01L29/66 , H01L29/06 , H01L29/10 , H01L21/033 , H01L21/8238 , H01L29/417
Abstract: A horizontal gate-all-around (GAA) field effect transistor (FET) is described. The horizontal GAA FET includes a substrate as well as a shallow trench isolation (STI) region on the substrate. The horizontal GAA FET includes a first nano-sheet structure on the substrate and extending through the STI region. The first nano-sheet structure includes a first drain/source region stacked on a first source/drain region. The first nano-sheet structure also includes a first channel region between the first drain/source region and the first source/drain region. The horizontal GAA FET also includes a first gate on the STI region and horizontally surrounding the first channel region on four sides.
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公开(公告)号：US20190305094A1
公开(公告)日：2019-10-03
申请号：US15937068
申请日：2018-03-27
Applicant: QUALCOMM Incorporated
Inventor： Gengming TAO , Bin YANG , Xia LI
IPC: H01L29/417 , H01L29/737 , H01L29/205 , H01L29/08 , H01L29/10 , H01L29/45 , H01L29/66 , H01L21/306 , H01L21/308 , H01L21/285
Abstract: In certain aspects, a heterojunction bipolar transistor (HBT) comprises a collector mesa, a base mesa on the collector mesa, and an emitter mesa on the base mesa. The base mesa has a tapered sidewall tapering from a wide bottom to a narrow top. The HBT further comprises a collector contact on a portion of the collector mesa and extending to a portion of the tapered sidewall of the base mesa.
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公开(公告)号：US20190027576A1
公开(公告)日：2019-01-24
申请号：US15710271
申请日：2017-09-20
Applicant: QUALCOMM Incorporated
Inventor： Bin YANG , Xia LI , Gengming TAO
IPC: H01L29/66 , H01L29/778
Abstract: A metal-oxide-semiconductor field effect transistor (MOSFET) device may include a substrate. A composite multilayer channel material may be on the substrate. The composite multilayer channel material may include a channel region, a source region, and a drain region. A gate may be on the channel region of the composite multilayer channel material.
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公开(公告)号：US20180254194A1
公开(公告)日：2018-09-06
申请号：US15450605
申请日：2017-03-06
Applicant: QUALCOMM Incorporated
Inventor： Xia LI , Bin YANG , Gengming TAO
IPC: H01L21/322 , H01L23/31 , H01L23/29 , H01L21/02
Abstract: An integrated circuit (IC) device may include a substrate having an active device layer. The integrated circuit may also include a first defect layer. The first defect layer may have a first surface facing a backside of the active device layer. The integrated circuit may further include a second defect layer. The second defect layer may face a second surface opposite the first surface of the first defect layer.
