公开(公告)号：US20170373032A1

公开(公告)日：2017-12-28

申请号：US15192825

申请日：2016-06-24

Applicant: QUALCOMM Incorporated

Inventor： Jihoon OH ,  Ruey Kae ZANG ,  Lizabeth Ann KESER ,  Reynante Tamunan ALVARADO ,  Haiyong XU ,  Yue LI ,  Steve BEZUK

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/49838 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/5227 ,  H01L23/5389 ,  H01L24/02 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/96 ,  H01L2224/0233 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/04105 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/06131 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/14131 ,  H01L2224/1416 ,  H01L2224/14177 ,  H01L2224/96 ,  H01L2924/141 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/19011 ,  H01L2924/19042 ,  H01L2924/2064 ,  H01L2924/381 ,  H01L2224/03 ,  H01L2224/11

Abstract: Disclosed is a fan-out wafer level packaging (FOWLP) apparatus includes a semiconductor die having at least one input/output (I/O) connection, a first plurality of package balls having a first package ball layout, a first conductive layer forming a first redistribution layer (RDL) and configured to electrically couple to the first plurality of package balls, and a second conductive layer forming a second RDL and including at least one conductive pillar configured to electrically couple the at least one I/O connection of the semiconductor die to the first conductive layer, wherein the second conductive layer enables the semiconductor die to be electrically coupled to a second plurality of package balls having a second package ball layout without a change in position of the at least one I/O connection of the semiconductor die.