公开(公告)号：US20160259743A1

公开(公告)日：2016-09-08

申请号：US15059009

申请日：2016-03-02

Applicant: QUALCOMM Incorporated

Inventor： Lior Amarilio ,  Boaz Moskovich ,  Michael Zilbershtein

IPC: G06F13/36 ,  G06F13/42

CPC classification number: G06F13/36 ,  G06F13/4282 ,  G06F13/4291 ,  H04L47/72 ,  Y02D10/14 ,  Y02D10/151

Abstract: Full bandwidth communication buses are disclosed. While primarily focused on the Serial Low-power Inter-chip Media Bus (SLIMbus) communication bus, the concepts of the present disclosure may be extended to other communication buses. Exemplary aspects of the present disclosure utilize a reserved segment distribution code and a segment length to define a Segment Interval that is better-sized relative to raw data bits. By fitting the segment interval to the size of the raw data bits, bandwidth utilization is maximized, resulting in faster effective data transfers. Completion of such efficient data transfers may allow the communication bus to spend more time in a low-power mode and thus, conserve power. Additionally, such efficient data transfers may allow for better quality in presentation of multimedia content to the user.

Abstract translation: 全带宽通信总线被公开。 虽然主要关注于串行低功率片上媒体总线（SLIMbus）通信总线，但是本公开的概念可以扩展到其他通信总线。 本公开的示例性方面利用保留段分布代码和段长度来定义相对于原始数据位更好的段间隔。 通过将段间隔拟合为原始数据位的大小，带宽利用率最大化，从而实现更快的有效数据传输。 完成这种有效的数据传输可以允许通信总线在低功率模式下花费更多的时间，从而节省功率。 此外，这种有效的数据传输可以允许在向用户呈现多媒体内容方面更好的质量。

公开(公告)号：US20180143938A1

公开(公告)日：2018-05-24

申请号：US15875937

申请日：2018-01-19

Applicant: QUALCOMM Incorporated

Inventor： Gilad Sthoeger ,  Michael Zilbershtein ,  Alexander Khazin ,  Ben Levin

IPC: G06F13/42 ,  G06F1/12

CPC classification number: G06F13/4282 ,  G06F1/12 ,  G06F13/423 ,  G06F13/4291 ,  Y02D10/14 ,  Y02D10/151

Abstract: A serial low-power inter-chip media bus communications link is deployed in apparatus having multiple Integrated Circuit devices. Communications capabilities of a device coupled to the communications link may be determined and configuration or framing message may be sent to the first device based on the capabilities. The messages may be transmitted on a primary data line of the communications link with a clock used to control timing of transmission on at least the primary data line. The communications capabilities can include information identifying a number of data wires supported by or coupled to the device. A first device may be configured to communicate with a second device over a secondary data line, which may be reserved for such direct communication. Communications on the secondary data line may be synchronized using the clock signal and may be controlled by a different protocol than the protocol used for the primary data line.

公开(公告)号：US20180225251A1

公开(公告)日：2018-08-09

申请号：US15942277

申请日：2018-03-30

Applicant: QUALCOMM Incorporated

Inventor： Gilad Sthoeger ,  Michael Zilbershtein ,  Alexander Khazin ,  Ben Levin

IPC: G06F13/42 ,  G06F1/12

CPC classification number: G06F13/4282 ,  G06F1/12 ,  G06F13/423 ,  G06F13/4291 ,  Y02D10/14 ,  Y02D10/151

Abstract: A serial low-power inter-chip media bus communications link is deployed in apparatus having multiple Integrated Circuit devices. Communications capabilities of a device coupled to the communications link may be determined and configuration or framing message may be sent to the first device based on the capabilities. The messages may be transmitted on a primary data line of the communications link with a clock used to control timing of transmission on at least the primary data line. The communications capabilities can include information identifying a number of data wires supported by or coupled to the device. A first device may be configured to communicate with a second device over a secondary data line, which may be reserved for such direct communication. Communications on the secondary data line may be synchronized using the clock signal and may be controlled by a different protocol than the protocol used for the primary data line.

公开(公告)号：US09229841B2

公开(公告)日：2016-01-05

申请号：US14202389

申请日：2014-03-10

Applicant: QUALCOMM Incorporated

Inventor： Michael Zilbershtein ,  Gilad Sthoeger ,  Alexander Khazin

IPC: G06F11/00 ,  G06F11/34 ,  G06F11/30 ,  G06F11/22

CPC classification number: G06F11/349 ,  G06F11/221 ,  G06F11/3027

Abstract: Systems and methods to detect errors and record actions on a bus are disclosed. In one embodiment, the bus is a serial low-power interchip media bus (SLIMbus) within a computing device. The SLIMbus is coupled to peripherals and a sniffer is positioned within the computing device and coupled to the SLIMbus. The sniffer mimics another SLIMbus peripheral. However, the sniffer uses a pair of multiplexers to know when to record data on the SLIMbus. The data, including the control header and payload of the data signal is captured and logged. The logged data is then exported to memory where it can be further processed so as to help debug communication on the SLIMbus.

Abstract translation: 公开了在总线上检测错误和记录动作的系统和方法。 在一个实施例中，总线是计算设备内的串行低功率芯片间介质总线（SLIMbus）。 SLIMbus耦合到外围设备，嗅探器位于计算设备内并与SLIMbus相连。 嗅探器模仿另一个SLIMbus外设。 然而，嗅探器使用一对多路复用器来知道何时在SLIMbus上记录数据。 捕获并记录数据，包括数据信号的控制头和有效载荷。 然后将记录的数据导出到存储器，以便进一步处理它们，以帮助调试SLIMbus上的通信。

公开(公告)号：US10509761B2

公开(公告)日：2019-12-17

申请号：US15942277

申请日：2018-03-30

Applicant: QUALCOMM Incorporated

Inventor： Gilad Sthoeger ,  Michael Zilbershtein ,  Alexander Khazin ,  Ben Levin

IPC: G06F13/42 ,  G06F1/12

Abstract: A serial low-power inter-chip media bus communications link is deployed in apparatus having multiple Integrated Circuit devices. Communications capabilities of a device coupled to the communications link may be determined and configuration or framing message may be sent to the first device based on the capabilities. The messages may be transmitted on a primary data line of the communications link with a clock used to control timing of transmission on at least the primary data line. The communications capabilities can include information identifying a number of data wires supported by or coupled to the device. A first device may be configured to communicate with a second device over a secondary data line, which may be reserved for such direct communication. Communications on the secondary data line may be synchronized using the clock signal and may be controlled by a different protocol than the protocol used for the primary data line.

公开(公告)号：US09934178B2

公开(公告)日：2018-04-03

申请号：US15059009

申请日：2016-03-02

Applicant: QUALCOMM Incorporated

Inventor： Lior Amarilio ,  Boaz Moskovich ,  Michael Zilbershtein

IPC: G06F13/36 ,  G06F13/42 ,  H04L12/911

CPC classification number: G06F13/36 ,  G06F13/4282 ,  G06F13/4291 ,  H04L47/72 ,  Y02D10/14 ,  Y02D10/151

Abstract: Full bandwidth communication buses are disclosed. While primarily focused on the Serial Low-power Inter-chip Media Bus (SLIMbus) communication bus, the concepts of the present disclosure may be extended to other communication buses. Exemplary aspects of the present disclosure utilize a reserved segment distribution code and a segment length to define a Segment Interval that is better-sized relative to raw data bits. By fitting the segment interval to the size of the raw data bits, bandwidth utilization is maximized, resulting in faster effective data transfers. Completion of such efficient data transfers may allow the communication bus to spend more time in a low-power mode and thus, conserve power. Additionally, such efficient data transfers may allow for better quality in presentation of multimedia content to the user.

公开(公告)号：US20150254154A1

公开(公告)日：2015-09-10

申请号：US14202389

申请日：2014-03-10

Applicant: QUALCOMM Incorporated

Inventor： Michael Zilbershtein ,  Gilad Sthoeger ,  Alexander Khazin

IPC: G06F11/34 ,  G06F11/30

CPC classification number: G06F11/349 ,  G06F11/221 ,  G06F11/3027

Abstract: Systems and methods to detect errors and record actions on a bus are disclosed. In one embodiment, the bus is a serial low-power interchip media bus (SLIMbus) within a computing device. The SLIMbus is coupled to peripherals and a sniffer is positioned within the computing device and coupled to the SLIMbus. The sniffer mimics another SLIMbus peripheral. However, the sniffer uses a pair of multiplexers to know when to record data on the SLIMbus. The data, including the control header and payload of the data signal is captured and logged. The logged data is then exported to memory where it can be further processed so as to help debug communication on the SLIMbus.

Abstract translation: 公开了在总线上检测错误和记录动作的系统和方法。 在一个实施例中，总线是计算设备内的串行低功率芯片间介质总线（SLIMbus）。 SLIMbus耦合到外围设备，嗅探器位于计算设备内并与SLIMbus相连。 嗅探器模仿另一个SLIMbus外设。 然而，嗅探器使用一对多路复用器来知道何时在SLIMbus上记录数据。 捕获并记录数据，包括数据信号的控制头和有效载荷。 然后将记录的数据导出到存储器，以便进一步处理它们，以帮助调试SLIMbus上的通信。