公开(公告)号：US20220020340A1

公开(公告)日：2022-01-20

申请号：US17092165

申请日：2020-11-06

Applicant: QUALCOMM Incorporated

Inventor： Paul Christopher John WIERCIENSKI ,  John Chi Kit WONG ,  Rahul GULATI ,  Gary Arthur CIAMBELLA ,  Sreekanth MODAIKKAL

IPC: G09G5/37 ,  G06T1/20 ,  G06F21/64 ,  G06F16/23

Abstract: The present disclosure relates to methods and apparatus for data processing, e.g., a display processing unit (DPU). The apparatus may receive data including a plurality of data bits, the data being associated with at least one data source. The apparatus may also determine whether at least a portion of the data corresponds to priority data, the priority data being within a region of interest (ROI). The apparatus may also detect an adjustment amount of the received data when at least a portion of the data corresponds to priority data, the data being displayed or stored based on the detected adjustment amount.

公开(公告)号：US20250124535A1

公开(公告)日：2025-04-17

申请号：US18485220

申请日：2023-10-11

Applicant: QUALCOMM Incorporated

Inventor： Sreekanth MODAIKKAL ,  Abhijit Kumar GUPTA ,  Kumar SAURABH

IPC: G06T1/20

Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for efficient multiple partial updates in display processing. A processor may obtain a software-based indication that indicates to start an execution of command packets. The processor may execute, based on the obtained software-based indication, a first set of command packets associated with a first ROI of a frame that is to be updated. The processor may obtain a hardware-based indication that indicates that the first set of command packets associated with the first ROI of the frame has been executed. The processor may execute, based on the obtained hardware-based indication, a second set of command packets associated with a second ROI of the frame that is to be updated.

公开(公告)号：US20240169883A1

公开(公告)日：2024-05-23

申请号：US18056649

申请日：2022-11-17

Applicant: QUALCOMM Incorporated

Inventor： Chun WANG ,  Sreekanth MODAIKKAL ,  Kumar SAURABH ,  Samson KIM ,  Kit Fong NG

IPC: G09G3/20 ,  G09G3/00 ,  G09G5/391

CPC classification number: G09G3/2096 ,  G09G3/001 ,  G09G5/391 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2340/0407 ,  G09G2360/06 ,  G09G2360/08 ,  G09G2370/10 ,  G09G2370/16

Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for a power efficient display architecture. A display processor may obtain an indication that UC is to be displayed at a first resolution or a second resolution, where the first resolution is higher than the second resolution. The display processor may drive a first display via a first controller of a first DPU based on the indication. The display processor may drive a second display via a controller of a second DPU if the UC is to be displayed at the first resolution, or drive the second display via a second controller of the first DPU if the UC is to be displayed at the second resolution.