Backlight control signal duty cycle extension scheme to avoid flicker

    公开(公告)号:US11436995B2

    公开(公告)日:2022-09-06

    申请号:US16928634

    申请日:2020-07-14

    Abstract: Certain aspects are directed to a circuit for brightness control. The circuit generally includes: a duty cycle adjustment circuit configured to receive a first backlight control signal having a first duty cycle and generate a second backlight control signal having a second duty cycle, the second duty cycle being greater than the first duty cycle if the first duty cycle is less than a threshold; a digital processor configured to set a value of a software brightness code based on the second duty cycle; and a backlight control circuit configured to drive a backlight in accordance with the software brightness code and the second duty cycle of the second backlight control signal.

    BACKLIGHT CONTROL SIGNAL DUTY CYCLE EXTENSION SCHEME TO AVOID FLICKER

    公开(公告)号:US20220020338A1

    公开(公告)日:2022-01-20

    申请号:US16928634

    申请日:2020-07-14

    Abstract: Certain aspects are directed to a circuit for brightness control. The circuit generally includes: a duty cycle adjustment circuit configured to receive a first backlight control signal having a first duty cycle and generate a second backlight control signal having a second duty cycle, the second duty cycle being greater than the first duty cycle if the first duty cycle is less than a threshold; a digital processor configured to set a value of a software brightness code based on the second duty cycle; and a backlight control circuit configured to drive a backlight in accordance with the software brightness code and the second duty cycle of the second backlight control signal.

    SWITCHED MODE POWER SUPPLY HAVING A STAIRCASE CURRENT LIMIT
    4.
    发明申请
    SWITCHED MODE POWER SUPPLY HAVING A STAIRCASE CURRENT LIMIT 有权
    具有静态电流限制的开关模式电源

    公开(公告)号:US20160268896A1

    公开(公告)日:2016-09-15

    申请号:US14656456

    申请日:2015-03-12

    Abstract: Disclosed is switching power supply that includes a pulse frequency modulation (PFM) mode of operation current feedback control. A reference current source is configured to output a reference current at one of several selectable levels. The level of the reference current may vary during operation of the current feedback control loop.

    Abstract translation: 公开了包括脉冲频率调制(PFM)工作模式电流反馈控制的开关电源。 参考电流源被配置为以几个可选电平之一输出参考电流。 参考电流的电平可能在电流反馈控制环路的操作期间变化。

    Gate driving technique to lower switch on-resistance in switching converter applications

    公开(公告)号:US11916470B2

    公开(公告)日:2024-02-27

    申请号:US17349687

    申请日:2021-06-16

    CPC classification number: H02M1/08

    Abstract: Techniques and apparatus for driving transistor gates of a switched-mode power supply (SMPS) circuit. One example power supply circuit generally includes a switching converter having a switching transistor and a gate driver having an output coupled to a gate of the switching transistor. The gate driver includes a first switching device coupled between the output of the gate driver and a first voltage rail; a second switching device coupled between the output of the gate driver and a voltage node of the gate driver; a third switching device coupled between the voltage node of the gate driver and a second voltage rail; and a voltage clamp coupled in series with a fourth switching device, the voltage clamp and the fourth switching device being coupled between a third voltage rail and the voltage node (or the output of the gate driver).

    Feed-forward frequency control method for current mode hysteretic buck regulator
    6.
    发明授权
    Feed-forward frequency control method for current mode hysteretic buck regulator 有权
    电流模式迟滞降压调节器的前馈频率控制方法

    公开(公告)号:US09264033B2

    公开(公告)日:2016-02-16

    申请号:US13791868

    申请日:2013-03-08

    Inventor: Sugato Mukherjee

    CPC classification number: H03K17/56 H02M3/1563

    Abstract: A hysteresis generator provides a hysteresis parameter V_hyst to a hysteresis comparator of a voltage regulator. The hysteresis parameter V_hyst is a function of circuit components of the hysteresis generator, a voltage output Vout of the regulator, a voltage input Vin of the regulator, and a signal that drives one of a plurality of switches of the regulator. A switch driver drives the switches based on the hysteresis parameter. One or more of the circuit components of the hysteresis generator that provide the hysteresis parameter also define a hysteresis time period T_hyst. The hysteresis time period T_hyst defines in combination with a delay time period T_Td of the regulator, a switching time period T for the regulator that is substantially constant.

    Abstract translation: 滞环发生器向电压调节器的滞后比较器提供滞后参数V_hyst。 滞后参数V_hyst是滞后发生器的电路部件,调节器的电压输出Vout,调节器的电压输入Vin以及驱动调节器的多个开关之一的信号的函数。 开关驱动器根据滞后参数驱动开关。 提供滞后参数的滞环发生器的一个或多个电路部件还定义了滞后时间段T_hyst。 滞后时间段T_hyst与调节器的延迟时间段T_Td相结合,稳定器的切换时间段T基本上是恒定的。

    Voltage Regulation with Frequency Control
    7.
    发明申请

    公开(公告)号:US20190190377A1

    公开(公告)日:2019-06-20

    申请号:US16228652

    申请日:2018-12-20

    CPC classification number: H02M3/155 H02M1/08 H02M1/44 H02M3/156 H02M2001/0048

    Abstract: Methods and apparatuses can implement voltage regulation with frequency control. In an example aspect, a voltage generator includes an output node and a switch. A voltage controller is coupled to the switch of the voltage generator. A mode controller is coupled to the voltage controller. The voltage controller is configured to control an output voltage at the output node by closing and opening the switch at a switching frequency. The voltage controller is configured to operate in multiple operational modes. The mode controller is configured to cause the voltage controller to shift between two or more operational modes responsive to the switching frequency. The switching frequency can be moved out of a rejection frequency band by shifting operational modes. Shifting can include, for example, shifting from a PFM mode to a PWM mode or shifting from one hysteresis mode to another hysteresis mode within the PFM mode.

    METHOD AND APPARATUS FOR ADVANCED PULSE SKIPPING CONTROL IN BUCK REGULATORS
    8.
    发明申请
    METHOD AND APPARATUS FOR ADVANCED PULSE SKIPPING CONTROL IN BUCK REGULATORS 审中-公开
    BUCK调节器中高级脉冲跳闸控制的方法和装置

    公开(公告)号:US20140253080A1

    公开(公告)日:2014-09-11

    申请号:US13793703

    申请日:2013-03-11

    Abstract: A method and apparatus for determining the entry and exit from a pulse skipping mode in a power supply is provided. The power supply may incorporate a buck regulator. The method begins when current is sensed at an inductor of a power supply. This sensed current is then compared with a predetermined threshold current value. If the comparison reveals that the current is below the predetermined threshold current value, a pulse skipping mode is entered. If the current is found to be above the predetermined threshold the pulse skipping mode is not entered and normal operation continues. The apparatus includes a transconductance amplifier, an offset voltage source, a reference power supply reference voltage source, first and second voltage comparators, and a processor.

    Abstract translation: 提供了一种用于确定电源中的脉冲跳过模式的进入和退出的方法和装置。 电源可以并入降压调节器。 当在电源的电感器处感测到电流时,该方法开始。 然后将该感测电流与预定的阈值电流值进行比较。 如果比较显示电流低于预定阈值电流值,则输入脉冲跳跃模式。 如果发现电流高于预定阈值,则不进入脉冲跳跃模式,并且正常操作继续。 该装置包括跨导放大器,偏移电压源,参考电源参考电压源,第一和第二电压比较器以及处理器。

    Gate driving technique to lower switch on-resistance in switching converter applications

    公开(公告)号:US12273021B2

    公开(公告)日:2025-04-08

    申请号:US18421175

    申请日:2024-01-24

    Abstract: Techniques and apparatus for driving transistor gates of a switched-mode power supply (SMPS) circuit. One example power supply circuit generally includes a switching converter having a switching transistor and a gate driver having an output coupled to a gate of the switching transistor. The gate driver includes a first switching device coupled between the output of the gate driver and a first voltage rail; a second switching device coupled between the output of the gate driver and a voltage node of the gate driver; a third switching device coupled between the voltage node of the gate driver and a second voltage rail; and a voltage clamp coupled in series with a fourth switching device, the voltage clamp and the fourth switching device being coupled between a third voltage rail and the voltage node (or the output of the gate driver).

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