公开(公告)号：US20190050366A1

公开(公告)日：2019-02-14

申请号：US16058599

申请日：2018-08-08

Applicant: QUALCOMM Incorporated

Inventor： Lalan Jee MISHRA ,  Raghukul TILAK ,  Zhurang ZHAO ,  Elisha ULMER ,  Richard Dominic WIETFELDT ,  Matthew SEVERSON

IPC: G06F13/42 ,  G06F9/448 ,  G06F9/30

Abstract: Systems, methods, and apparatus for communication virtualized general-purpose input/output (GPIO) signals over a serial communication link. A method performed at a device coupled to a serial bus includes determining that GPIO state information corresponding to a physical GPIO pin or signal is available in an event register that has a first bit width and includes information identifying one or more devices associated with the event register, and exchanging the GPIO state information with the one or more devices over the serial bus. The GPIO state information may be transmitted over the serial bus in accordance with configuration information stored in the event register. The configuration information may include an address identifying the one or more devices. The configuration information may include addressing information identifying a target register in the one or more devices. The configuration information may include information identifying a mode of communication for transmitting the GPIO state information.

公开(公告)号：US20240201762A1

公开(公告)日：2024-06-20

申请号：US18082518

申请日：2022-12-15

Applicant: QUALCOMM Incorporated

Inventor： Aravind BHASKARA ,  Zhurang ZHAO ,  Kiran BHAGWAT ,  Michael TIPTON ,  Joshua STUBBS ,  Jyotirmoy DAS ,  Thomas TANG

IPC: G06F1/26 ,  G06F1/08

CPC classification number: G06F1/26 ,  G06F1/08

Abstract: Various dynamic voltage and frequency scaling (DVFS) techniques can optimize the high voltage residency of a device containing multiple processing cores that share a voltage rail. The DVFS techniques described herein can reduce the high voltage residency (duration) of the voltage rail by aligning the high frequency duration of multiple cores sharing the same voltage rail.

公开(公告)号：US20240276096A1

公开(公告)日：2024-08-15

申请号：US18165189

申请日：2023-02-06

Applicant: QUALCOMM Incorporated

Inventor： Aravind BHASKARA ,  Tauseef KAZI ,  Zhurang ZHAO ,  Rohan DESAI ,  Michael TIPTON ,  Joshua STUBBS ,  Kiran BHAGWAT ,  Pavan Kumar CHILAMKURTHI

IPC: H04N23/65 ,  H04N25/71

CPC classification number: H04N23/651 ,  H04N25/745

Abstract: Systems, methods, and computer-readable media are provided for camera dynamic voting to optimize fast sensor mode power. In some examples, a computing device can obtain, based on performing dynamic voting, a plurality of votes associated with a plurality of components sharing a power source. The computing device can determine a voting result based on the plurality of votes. The computing device can increase or decreasing a clock rate and a voltage for the power source based on the voting result to produce an updated clock rate and an updated voltage. The computing device can then apply the updated clock rate and the updated voltage to an image processor.