公开(公告)号：US09337268B2

公开(公告)日：2016-05-10

申请号：US13108366

申请日：2011-05-16

申请人： Qingchun Zhang ,  Craig Capell ,  Anant Agarwal ,  Sei-Hyung Ryu

发明人： Qingchun Zhang ,  Craig Capell ,  Anant Agarwal ,  Sei-Hyung Ryu

IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/36 ,  H01L29/732 ,  H01L29/739 ,  H01L29/74 ,  H01L29/78 ,  H01L29/861 ,  H01L29/16

CPC分类号： H01L29/7813 ,  H01L21/0465 ,  H01L29/0615 ,  H01L29/0661 ,  H01L29/1004 ,  H01L29/1016 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/36 ,  H01L29/732 ,  H01L29/7397 ,  H01L29/74 ,  H01L29/861

摘要： A negative bevel edge termination for a Silicon Carbide (SiC) semiconductor device is disclosed. In one embodiment, the negative bevel edge termination includes multiple steps that approximate a smooth negative bevel edge termination at a desired slope. More specifically, in one embodiment, the negative bevel edge termination includes at least five steps, at least ten steps, or at least 15 steps. The desired slope is, in one embodiment, less than or equal to fifteen degrees. In one embodiment, the negative bevel edge termination results in a blocking voltage for the semiconductor device of at least 10 kilovolts (kV) or at least 12 kV. The semiconductor device is preferably, but not necessarily, a thyristor such as a power thyristor, a Bipolar Junction Transistor (BJT), an Insulated Gate Bipolar Transistor (IGBT), a U-channel Metal-Oxide-Semiconductor Field Effect Transistor (UMOSFET), or a PIN diode.

摘要翻译： 公开了一种用于碳化硅（SiC）半导体器件的负斜面边缘终端。 在一个实施例中，负斜边缘终端包括以期望的斜率近似平滑负斜面边缘终止的多个步骤。 更具体地，在一个实施例中，负斜边缘终止包括至少五个步骤，至少十个步骤或至少15个步骤。 在一个实施例中，期望的斜率小于或等于十五度。 在一个实施例中，负斜边缘终止导致半导体器件的阻挡电压为至少10千伏（kV）或至少12kV。 半导体器件优选但不一定是晶闸管，例如功率晶闸管，双极结晶体管（BJT），绝缘栅双极晶体管（IGBT），U沟道金属氧化物半导体场效应晶体管（UMOSFET） 或PIN二极管。

公开(公告)号：US09306004B2

公开(公告)日：2016-04-05

申请号：US13108366

申请日：2011-05-16

申请人： Qingchun Zhang ,  Craig Capell ,  Anant Agarwal ,  Sei-Hyung Ryu

发明人： Qingchun Zhang ,  Craig Capell ,  Anant Agarwal ,  Sei-Hyung Ryu

IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/36 ,  H01L29/732 ,  H01L29/739 ,  H01L29/74 ,  H01L29/78 ,  H01L29/861 ,  H01L29/16

摘要： A negative bevel edge termination for a Silicon Carbide (SiC) semiconductor device is disclosed. In one embodiment, the negative bevel edge termination includes multiple steps that approximate a smooth negative bevel edge termination at a desired slope. More specifically, in one embodiment, the negative bevel edge termination includes at least five steps, at least ten steps, or at least 15 steps. The desired slope is, in one embodiment, less than or equal to fifteen degrees. In one embodiment, the negative bevel edge termination results in a blocking voltage for the semiconductor device of at least 10 kilovolts (kV) or at least 12 kV. The semiconductor device is preferably, but not necessarily, a thyristor such as a power thyristor, a Bipolar Junction Transistor (BJT), an Insulated Gate Bipolar Transistor (IGBT), a U-channel Metal-Oxide-Semiconductor Field Effect Transistor (UMOSFET), or a PIN diode.

公开(公告)号：US20120292636A1

公开(公告)日：2012-11-22

申请号：US13108366

申请日：2011-05-16

申请人： Qingchun Zhang ,  Craig Capell ,  Anant Agarwal ,  Sei-Hyung Ryu

发明人： Qingchun Zhang ,  Craig Capell ,  Anant Agarwal ,  Sei-Hyung Ryu

IPC分类号： H01L29/161

CPC分类号： H01L29/7813 ,  H01L21/0465 ,  H01L29/0615 ,  H01L29/0661 ,  H01L29/1004 ,  H01L29/1016 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/36 ,  H01L29/732 ,  H01L29/7397 ,  H01L29/74 ,  H01L29/861

摘要： A negative bevel edge termination for a Silicon Carbide (SiC) semiconductor device is disclosed. In one embodiment, the negative bevel edge termination includes multiple steps that approximate a smooth negative bevel edge termination at a desired slope. More specifically, in one embodiment, the negative bevel edge termination includes at least five steps, at least ten steps, or at least 15 steps. The desired slope is, in one embodiment, less than or equal to fifteen degrees. In one embodiment, the negative bevel edge termination results in a blocking voltage for the semiconductor device of at least 10 kilovolts (kV) or at least 12 kV. The semiconductor device is preferably, but not necessarily, a thyristor such as a power thyristor, a Bipolar Junction Transistor (BJT), an Insulated Gate Bipolar Transistor (IGBT), a U-channel Metal-Oxide-Semiconductor Field Effect Transistor (UMOSFET), or a PIN diode.

摘要翻译： 公开了一种用于碳化硅（SiC）半导体器件的负斜面边缘终端。 在一个实施例中，负斜边缘终端包括以期望的斜率近似平滑负斜面边缘终止的多个步骤。 更具体地，在一个实施例中，负斜边缘终止包括至少五个步骤，至少十个步骤或至少15个步骤。 在一个实施例中，期望的斜率小于或等于十五度。 在一个实施例中，负斜边缘终止导致半导体器件的阻挡电压为至少10千伏（kV）或至少12kV。 半导体器件优选但不一定是晶闸管，例如功率晶闸管，双极结晶体管（BJT），绝缘栅双极晶体管（IGBT），U沟道金属氧化物半导体场效应晶体管（UMOSFET） 或PIN二极管。

公开(公告)号：US06514779B1

公开(公告)日：2003-02-04

申请号：US09981523

申请日：2001-10-17

申请人： Sei-Hyung Ryu ,  Anant Agarwal ,  Craig Capell ,  John W. Palmour

发明人： Sei-Hyung Ryu ,  Anant Agarwal ,  Craig Capell ,  John W. Palmour

IPC分类号： G01R3126

CPC分类号： G01R31/2831 ,  H01L22/22 ,  H01L2924/0002 ,  H01L2924/00

摘要： A silicon carbide device is fabricated by forming a plurality of a same type of silicon carbide devices on at least a portion of a silicon carbide wafer in a predefined pattern. The silicon carbide devices have corresponding first contacts on a first face of the silicon carbide wafer. The plurality of silicon carbide devices are electrically, tested to identify ones of the plurality of silicon carbide devices which pass an electrical test. The first contact of the identified ones of the silicon carbide devices are then selectively interconnected. Devices having a plurality of selectively connected silicon carbide devices of the same type are also provided.

摘要翻译： 通过在预定图案的碳化硅晶片的至少一部分上形成多个相同类型的碳化硅器件来制造碳化硅器件。 碳化硅器件在碳化硅晶片的第一面上具有对应的第一接触。 多个碳化硅器件被电学测试以识别通过电测试的多个碳化硅器件中的一个。 所识别的碳化硅器件的第一接触然后被选择性地互连。 还提供了具有相同类型的多个选择性连接的碳化硅器件的器件。