摘要:
A frequency modulation (FM) tone signal generator for generating a FM tone signal is disclosed. The tone signal generator includes a waveform generator having a plurality of wave tables, a selector and an enveloper. The waveform generator furnishes a waveform signal in response to a phase angle address signal. Each wave table stores a different waveform. The selector selects one of the wave tables in response to a plurality of selection signals such that the selected wave table largely provides the waveform signal upon being addressed largely by the phase angle address signal. Selection of the selected wave table varies with each selection signal. The enveloper impresses an envelope signal on the waveform signal. The envelope signal is used as a carrier or modulator for generating the FM tone signal.
摘要:
A frequency modulation (FM) tone signal generator for generating a FM tone signal is disclosed. The tone signal generator includes a waveform generator having a plurality of wave tables, a selector and an enveloper. The waveform generator furnishes a waveform signal in response to a phase angle address signal. Each wave table stores a different waveform. The selector selects one of the wave tables in response to a plurality of selection signals such that the selected wave table largely provides the waveform signal upon being addressed largely by the phase angle address signal. Selection of the selected wave table varies with each selection signal. The enveloper impresses an envelope signal on the waveform signal. The envelope signal is used as a carrier or modulator for generating the FM tone signal.
摘要:
A sound or music synthesizer includes a reverberation simulator having a substantially reduced volatile storage, random access memory, or buffer size in comparison to conventional reverberation simulators by decimating the sound signal prior to applying the sound signal to a reverberator and then interpolating the sound signal generated by the reverberator to restore the sample frequency. The substantial reduction in buffer size enables the usage of the reverberator in low-cost, reduced size and single-chip environments.
摘要:
Various methods and systems for implementing Reed Solomon multiplication sections from exclusive-OR (XOR) logic are disclosed. For example, a system includes a Reed Solomon multiplication section, which includes XOR-based logic. The XOR-based logic includes an input, an output, and one or more XOR gates. A symbol X is received at the input of the XOR-based logic. The one or more XOR gates are coupled to generate a product of a power of α and X at the output, wherein α is a root of a primitive polynomial of a Reed Solomon code. Such a Reed Solomon multiplication section, which can include one or more multipliers implemented using XOR-based logic, can be included in a Reed Solomon encoder or decoder.
摘要:
Various methods and systems for implementing Reed Solomon multiplication sections from exclusive-OR (XOR) logic are disclosed. For example, a system includes a Reed Solomon multiplication section, which includes XOR-based logic. The XOR-based logic includes an input, an output, and one or more XOR gates. A symbol X is received at the input of the XOR-based logic. The one or more XOR gates are coupled to generate a product of a power of α and X at the output, wherein α is a root of a primitive polynomial of a Reed Solomon code. Such a Reed Solomon multiplication section, which can include one or more multipliers implemented using XOR-based logic, can be included in a Reed Solomon encoder or decoder.
摘要:
Various methods and systems for implementing Reed Solomon multiplication sections from exclusive-OR (XOR) logic are disclosed. For example, a system includes a Reed Solomon multiplication section, which includes XOR-based logic. The XOR-based logic includes an input, an output, and one or more XOR gates. A symbol X is received at the input of the XOR-based logic. The one or more XOR gates are coupled to generate a product of a power of α and X at the output, wherein α is a root of a primitive polynomial of a Reed Solomon code. Such a Reed Solomon multiplication section, which can include one or more multipliers implemented using XOR-based logic, can be included in a Reed Solomon encoder or decoder.
摘要:
Various methods and systems for implementing Reed Solomon multiplication sections from exclusive-OR (XOR) logic are disclosed. For example, a system includes a Reed Solomon multiplication section, which includes XOR-based logic. The XOR-based logic includes an input, an output, and one or more XOR gates. A symbol X is received at the input of the XOR-based logic. The one or more XOR gates are coupled to generate a product of a power of α and X at the output, wherein α is a root of a primitive polynomial of a Reed Solomon code. Such a Reed Solomon multiplication section, which can include one or more multipliers implemented using XOR-based logic, can be included in a Reed Solomon encoder or decoder.