Method of manufacturing semiconductor devices having high planar junction breakdown voltage
    2.
    发明授权
    Method of manufacturing semiconductor devices having high planar junction breakdown voltage 失效
    制造具有高平面断点电压的半导体器件的方法

    公开(公告)号:US3664894A

    公开(公告)日:1972-05-23

    申请号:US3664894D

    申请日:1970-02-24

    Applicant: RCA CORP

    Abstract: A body of semiconductor material having first and second opposed faces, and containing a region of N type conductivity and a region of P type conductivity separated by a P-N junction. The N type region contains a central portion extending inward from one face partially through the body toward the second face, and a peripheral portion extending completely through the body with its resistivity increasing toward the second face relative to the remainder of the N type region adjacent the P-N junction. The peripheral portion encloses the P type region and extends the P-N junction to the second face where it has the least chance for voltage breakdown.

    Abstract translation: 具有第一和第二相对面的半导体材料体,并且包含N型导电性区域和由P-N结分离的P型电导率区域。 N型区域包含从一个面部分地穿过本体朝向第二面向内延伸的中心部分,以及完全延伸穿过本体的周边部分,其电阻率相对于邻近N型区域的其余部分朝向第二面增加。 PN结。 外围部分包围P型区域,并且将P-N结延伸到第二面,其中电极击穿的机会最小。

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