公开(公告)号：US09785176B2

公开(公告)日：2017-10-10

申请号：US15043154

申请日：2016-02-12

Applicant: Renesas Electronics Corporation

Inventor： Mitsuya Fukazawa ,  Kenji Furusawa

IPC: G05F3/20 ,  G05F3/30 ,  G05F3/16

CPC classification number: G05F3/16 ,  G05F3/20 ,  G05F3/30

Abstract: A reference voltage generating circuit including a bandgap reference circuit generating a bandgap reference voltage, and a filter circuit smoothing the bandgap reference voltage. The bandgap reference circuit is configured to generate the bandgap reference voltage having a first voltage value when a clock signal is in a first logic level, and to generate the bandgap reference voltage having a second voltage value when the clock signal is in a second logic level. The filter circuit includes a first capacitive element charged with the bandgap reference voltage having the first voltage value in the first clock cycle, a second capacitive element charged with the bandgap reference voltage having the second voltage value in the first clock cycle, a third capacitive element charged with the bandgap reference voltage, and a fourth capacitive element.

公开(公告)号：US09285822B2

公开(公告)日：2016-03-15

申请号：US14072633

申请日：2013-11-05

Applicant: Renesas Electronics Corporation

Inventor： Mitsuya Fukazawa ,  Kenji Furusawa

IPC: G05F3/30 ,  G05F3/20

CPC classification number: G05F3/16 ,  G05F3/20 ,  G05F3/30

Abstract: A BGR circuit controls a switch circuit in synchronization with a clock signal from a control signal generating circuit and an inverted signal thereof, and thereby, alternately switches between a differential input terminal receiving a voltage VIM and a differential input terminal receiving a voltage VIP. An LPF circuit includes capacitive elements, a switch connected between an input node and each capacitive element, and a switch connected between an output node and each capacitive element. The LPF circuit controls ON/OFF of the switches in synchronization with a clock signal CLK, and thereby, calculates a moving average value of an output voltage of the BGR circuit in the most recent one clock cycle.

Abstract translation: BGR电路与来自控制信号发生电路的时钟信号及其反相信号同步地控制开关电路，从而交替地在接收电压VIM的差分输入端子和接收电压VIP的差分输入端子之间切换。 LPF电路包括电容元件，连接在输入节点和每个电容元件之间的开关，以及连接在输出节点和每个电容元件之间的开关。 LPF电路与时钟信号CLK同步地控制开关的ON / OFF，从而计算最近一个时钟周期中BGR电路的输出电压的移动平均值。

公开(公告)号：US08988137B2

公开(公告)日：2015-03-24

申请号：US13738546

申请日：2013-01-10

Applicant: Renesas Electronics Corporation

Inventor： Kenji Furusawa ,  Mitsuya Fukazawa

IPC: G05F1/10 ,  G05F3/16

CPC classification number: G05F3/16 ,  G05F3/30

Abstract: A reference voltage generating circuit with extremely low temperature dependence is provided. The reference voltage generating circuit includes a BGR circuit which generates a bandgap reference voltage; a bandgap current generating circuit which generates a bandgap current according to the bandgap reference voltage; a PTAT current generating circuit which generates a current proportional to the absolute temperature; and a linear approximate correction current generating circuit which compares the current generated by the PTAT current generating circuit and the bandgap current to generate a correction current, and the BGR circuit adds, to the bandgap reference voltage, a correction voltage generated based on the correction current.

Abstract translation: 提供了具有极低温度依赖性的参考电压发生电路。 参考电压产生电路包括产生带隙参考电压的BGR电路; 带隙电流产生电路，其根据带隙基准电压产生带隙电流; 产生与绝对温度成比例的电流的PTAT电流产生电路; 以及线性近似校正电流产生电路，其比较由PTAT电流产生电路产生的电流和带隙电流以产生校正电流，并且BGR电路将基于校正电流产生的校正电压加到带隙基准电压 。

公开(公告)号：US20160161971A1

公开(公告)日：2016-06-09

申请号：US15043154

申请日：2016-02-12

Applicant: Renesas Electronics Corporation

Inventor： Mitsuya Fukazawa ,  Kenji Furusawa

IPC: G05F3/16

CPC classification number: G05F3/16 ,  G05F3/20 ,  G05F3/30

Abstract: A reference voltage generating circuit including a bandgap reference circuit generating a bandgap reference voltage, and a filter circuit smoothing the bandgap reference voltage. The bandgap reference circuit is configured to generate the bandgap reference voltage having a first voltage value when a clock signal is in a first logic level, and to generate the bandgap reference voltage having a second voltage value when the clock signal is in a second logic level. The filter circuit includes a first capacitive element charged with the bandgap reference voltage having the first voltage value in the first clock cycle, a second capacitive element charged with the bandgap reference voltage having the second voltage value in the first clock cycle, a third capacitive element charged with the bandgap reference voltage, and a fourth capacitive element.

Abstract translation: 包括产生带隙参考电压的带隙基准电路的参考电压产生电路和平滑带隙参考电压的滤波器电路。 带隙参考电路被配置为当时钟信号处于第一逻辑电平时产生具有第一电压值的带隙参考电压，并且当时钟信号处于第二逻辑电平时产生具有第二电压值的带隙基准电压 。 滤波器电路包括：第一电容元件，充电具有第一时钟周期中的第一电压值的带隙基准电压;充电在第一时钟周期中具有第二电压值的带隙参考电压的第二电容元件;第三电容元件 充电带隙参考电压，以及第四电容元件。

公开(公告)号：US09335778B2

公开(公告)日：2016-05-10

申请号：US14641272

申请日：2015-03-06

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kenji Furusawa ,  Mitsuya Fukazawa

IPC: G05F3/30 ,  G05F3/16

CPC classification number: G05F3/16 ,  G05F3/30

Abstract: A reference voltage generating circuit with extremely low temperature dependence is provided. The reference voltage generating circuit includes a BGR circuit which generates a bandgap reference voltage; a bandgap current generating circuit which generates a bandgap current according to the bandgap reference voltage; a PTAT current generating circuit which generates a current proportional to the absolute temperature; and a linear approximate correction current generating circuit which compares the current generated by the PTAT current generating circuit and the bandgap current to generate a correction current, and the BGR circuit adds, to the bandgap reference voltage, a correction voltage generated based on the correction current.

公开(公告)号：US20140132241A1

公开(公告)日：2014-05-15

申请号：US14072633

申请日：2013-11-05

Applicant: Renesas Electronics Corporation

Inventor： Mitsuya Fukazawa ,  Kenji Furusawa

IPC: G05F3/16

CPC classification number: G05F3/16 ,  G05F3/20 ,  G05F3/30

Abstract: A BGR circuit controls a switch circuit in synchronization with a clock signal from a control signal generating circuit and an inverted signal thereof, and thereby, alternately switches between a differential input terminal receiving a voltage VIM and a differential input terminal receiving a voltage VIP. An LPF circuit includes capacitive elements, a switch connected between an input node and each capacitive element, and a switch connected between an output node and each capacitive element. The LPF circuit controls ON/OFF of the switches in synchronization with a clock signal CLK, and thereby, calculates a moving average value of an output voltage of the BGR circuit in the most recent one clock cycle.

Abstract translation: BGR电路与来自控制信号发生电路的时钟信号及其反相信号同步地控制开关电路，从而交替地在接收电压VIM的差分输入端子和接收电压VIP的差分输入端子之间切换。 LPF电路包括电容元件，连接在输入节点和每个电容元件之间的开关，以及连接在输出节点和每个电容元件之间的开关。 LPF电路与时钟信号CLK同步地控制开关的ON / OFF，从而计算最近一个时钟周期中BGR电路的输出电压的移动平均值。