公开(公告)号：US20170076777A1

公开(公告)日：2017-03-16

申请号：US15360404

申请日：2016-11-23

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Masaaki IIJIMA ,  Mitsuhiro DEGUCHI

IPC: G11C11/4076 ,  H03K5/159

CPC classification number: G11C11/4076 ,  G06F13/1689 ,  G11C7/1066 ,  G11C7/1093 ,  G11C7/222 ,  G11C11/4093 ,  G11C29/023 ,  G11C29/028 ,  H03K5/159 ,  H03K19/0016 ,  H03K19/096

Abstract: An interface circuit provided in a semiconductor device supplies an operation clock to an external memory device based on a clock signal (CK) and receives a data signal (DQ) and a strobe signal (DQS) from the external memory device. The interface circuit includes a delay circuit delaying the received strobe signal (DQS). The delay circuit includes a first adjustment circuit and a second adjustment circuit connected in series with the first adjustment circuit. The first adjustment circuit is capable of adjusting a delay amount of the strobe signal (DQS) in a plurality of steps in accordance with the set frequency of the clock signal (CK). The second adjustment circuit is capable of adjusting the delay amount of the strobe signal (DQS) with a higher precision than the first adjustment circuit.

Abstract translation: 设置在半导体装置中的接口电路基于时钟信号（CK）向外部存储器件提供操作时钟，并从外部存储器件接收数据信号（DQ）和选通信号（DQS）。 接口电路包括延迟接收的选通信号（DQS）的延迟电路。 延迟电路包括与第一调整电路串联连接的第一调整电路和第二调整电路。 第一调整电路能够根据时钟信号（CK）的设定频率，在多个步骤中调整选通信号（DQS）的延迟量。 第二调整电路能够以比第一调整电路更高的精度来调整选通信号（DQS）的延迟量。