Semiconductor device with reduced leakage current and method for making the same
    2.
    发明授权
    Semiconductor device with reduced leakage current and method for making the same 有权
    具有减小漏电流的半导体器件及其制造方法

    公开(公告)号:US09530853B2

    公开(公告)日:2016-12-27

    申请号:US14627340

    申请日:2015-02-20

    摘要: A semiconductor device with reduced leakage current and a method of making the same is disclosed. The semiconductor device includes a substrate having a device layer, a dielectric layer, and a gate metal opening within the dielectric layer between a source contact and a gate contact. A first metal layer is disposed within the gate metal opening, and a second metal layer is disposed directly onto the second metal layer, wherein the second metal layer is oxidized and has a thickness that ranges from about 4 Angstroms to about 20 Angstroms to limit a leakage current of a total gate periphery to between around 0.1 μA/mm and around 50 μA/mm. A current carrying layer is disposed on the second metal layer. In one embodiment, the first metal layer is nickel (Ni), the second metal layer is palladium (Pd), and the current carrying layer is gold (Au).

    摘要翻译: 公开了一种具有减小的漏电流的半导体器件及其制造方法。 半导体器件包括在源极接触和栅极接触之间的介电层内具有器件层,电介质层和栅极金属开口的衬底。 第一金属层设置在栅极金属开口内,并且第二金属层直接设置在第二金属层上,其中第二金属层被氧化并且具有在约4埃至约20埃的范围内以限制 总门外围的漏电流在约0.1μA/ mm到约50μA/ mm之间。 载流层设置在第二金属层上。 在一个实施例中,第一金属层是镍(Ni),第二金属层是钯(Pd),载流层是金(Au)。

    High voltage field effect transitor finger terminations
    3.
    发明授权
    High voltage field effect transitor finger terminations 有权
    高电压场效应器手指终端

    公开(公告)号:US09564497B2

    公开(公告)日:2017-02-07

    申请号:US14749274

    申请日:2015-06-24

    摘要: A field effect transistor having at least one structure configured to redistribute and/or reduce an electric field from gate finger ends is disclosed. Embodiments of the field effect transistor include a substrate, an active region disposed on the substrate, at least one source finger in contact with the active region, at least one drain finger in contact with the active region, and at least one gate finger in rectifying contact with the active region. One embodiment has at least one end of the at least one gate finger extending outside of the active region. Another embodiment includes at least one source field plate integral with the at least one source finger. The at least one source field plate extends over the at least one gate finger that includes a portion outside of the active region. Either embodiment can also include a sloped gate foot to further improve high voltage operation.

    摘要翻译: 公开了具有至少一种结构的场效应晶体管,其被配置为重新分布和/或减少栅极指末端的电场。 场效应晶体管的实施例包括基板,设置在基板上的有源区,与有源区接触的至少一个源极指,与有源区接触的至少一个漏极指,以及整流中的至少一个栅极指 与活动区域接触。 一个实施例具有至少一个门指的至少一端延伸到有源区的外部。 另一个实施例包括与所述至少一个源手指成一体的至少一个源极场板。 所述至少一个源极场板在所述至少一个栅极指状物上延伸,所述至少一个栅极指包括有源区域外部的部分。 任何一个实施例还可以包括倾斜门脚,以进一步改善高压操作。

    SEMICONDUCTOR DEVICE WITH REDUCED LEAKAGE CURRENT AND METHOD FOR MAKING THE SAME
    4.
    发明申请
    SEMICONDUCTOR DEVICE WITH REDUCED LEAKAGE CURRENT AND METHOD FOR MAKING THE SAME 有权
    具有降低漏电流的半导体器件及其制造方法

    公开(公告)号:US20150255560A1

    公开(公告)日:2015-09-10

    申请号:US14627340

    申请日:2015-02-20

    摘要: A semiconductor device with reduced leakage current and a method of making the same is disclosed. The semiconductor device includes a substrate having a device layer, a dielectric layer, and a gate metal opening within the dielectric layer between a source contact and a gate contact. A first metal layer is disposed within the gate metal opening, and a second metal layer is disposed directly onto the second metal layer, wherein the second metal layer is oxidized and has a thickness that ranges from about 4 Angstroms to about 20 Angstroms to limit a leakage current of a total gate periphery to between around 0.1 μA/mm and around 50 μA/mm. A current carrying layer is disposed on the second metal layer. In one embodiment, the first metal layer is nickel (Ni), the second metal layer is palladium (Pd), and the current carrying layer is gold (Au).

    摘要翻译: 公开了一种具有减小的漏电流的半导体器件及其制造方法。 半导体器件包括在源极接触和栅极接触之间的介电层内具有器件层,电介质层和栅极金属开口的衬底。 第一金属层设置在栅极金属开口内,并且第二金属层直接设置在第二金属层上,其中第二金属层被氧化并且具有在约4埃至约20埃的范围内以限制 总门外围的漏电流在约0.1μA/ mm到约50μA/ mm之间。 载流层设置在第二金属层上。 在一个实施例中,第一金属层是镍(Ni),第二金属层是钯(Pd),载流层是金(Au)。

    Methods for fabricating high voltage field effect transistor finger terminations
    5.
    发明授权
    Methods for fabricating high voltage field effect transistor finger terminations 有权
    制造高电压场效应晶体管手指终端的方法

    公开(公告)号:US09093420B2

    公开(公告)日:2015-07-28

    申请号:US13795986

    申请日:2013-03-12

    摘要: Methods for fabricating a field effect transistor having at least one structure configured to redistribute and/or reduce an electric field from gate finger ends are disclosed. The methods provide field effect transistors that each include a substrate, an active region disposed on the substrate, at least one source finger in contact with the active region, at least one drain finger in contact with the active region, and at least one gate finger in rectifying contact with the active region. One embodiment has at least one end of the at least one gate finger extending outside of the active region. At least one method includes etching at least one gate channel into the passivation layer with a predetermined slope that reduces electric fields at a gate edge. Other methods include steps for fabricating a sloped gate foot, a round end, and/or a chamfered end to further improve high voltage operation.

    摘要翻译: 公开了制造具有至少一种结构的场效应晶体管的方法,该结构被配置为重新分布和/或减少栅极指末端的电场。 这些方法提供场效应晶体管,其各自包括衬底,设置在衬底上的有源区,与有源区接触的至少一个源极指,与有源区接触的至少一个漏极指,以及至少一个栅极指 与活性区域整流接触。 一个实施例具有至少一个门指的至少一端延伸到有源区的外部。 至少一种方法包括以预定斜率将至少一个栅极通道蚀刻到钝化层中,该斜率减小栅极边缘处的电场。 其他方法包括用于制造倾斜门脚,圆端和/或倒角端的步骤,以进一步改善高压操作。

    HIGH VOLTAGE FIELD EFFECT TRANSITOR FINGER TERMINATIONS
    6.
    发明申请
    HIGH VOLTAGE FIELD EFFECT TRANSITOR FINGER TERMINATIONS 有权
    高电压场效应管指尖终止

    公开(公告)号:US20150295053A1

    公开(公告)日:2015-10-15

    申请号:US14749274

    申请日:2015-06-24

    摘要: A field effect transistor having at least one structure configured to redistribute and/or reduce an electric field from gate finger ends is disclosed. Embodiments of the field effect transistor include a substrate, an active region disposed on the substrate, at least one source finger in contact with the active region, at least one drain finger in contact with the active region, and at least one gate finger in rectifying contact with the active region. One embodiment has at least one end of the at least one gate finger extending outside of the active region. Another embodiment includes at least one source field plate integral with the at least one source finger. The at least one source field plate extends over the at least one gate finger that includes a portion outside of the active region. Either embodiment can also include a sloped gate foot to further improve high voltage operation.

    摘要翻译: 公开了具有至少一种结构的场效应晶体管,其被配置为重新分布和/或减少栅极指末端的电场。 场效应晶体管的实施例包括基板,设置在基板上的有源区,与有源区接触的至少一个源极指,与有源区接触的至少一个漏极指,以及整流中的至少一个栅极指 与活动区域接触。 一个实施例具有至少一个门指的至少一端延伸到有源区的外部。 另一个实施例包括与所述至少一个源手指成一体的至少一个源极场板。 所述至少一个源极场板在所述至少一个栅极指状物上延伸,所述至少一个栅极指包括有源区域外部的部分。 任何一个实施例还可以包括倾斜门脚,以进一步改善高压操作。

    High voltage field effect transistor finger terminations
    7.
    发明授权
    High voltage field effect transistor finger terminations 有权
    高电压场效应晶体管手指端接

    公开(公告)号:US09136341B2

    公开(公告)日:2015-09-15

    申请号:US13795926

    申请日:2013-03-12

    摘要: A field effect transistor having at least one structure configured to redistribute and/or reduce an electric field from gate finger ends is disclosed. Embodiments of the field effect transistor include a substrate, an active region disposed on the substrate, at least one source finger in contact with the active region, at least one drain finger in contact with the active region, and at least one gate finger in rectifying contact with the active region. One embodiment has at least one end of the at least one gate finger extending outside of the active region. Another embodiment includes at least one source field plate integral with the at least one source finger. The at least one source field plate extends over the at least one gate finger that includes a portion outside of the active region. Either embodiment can also include a sloped gate foot to further improve high voltage operation.

    摘要翻译: 公开了具有至少一种结构的场效应晶体管,其被配置为重新分布和/或减少栅极指末端的电场。 场效应晶体管的实施例包括基板,设置在基板上的有源区,与有源区接触的至少一个源极指,与有源区接触的至少一个漏极指,以及整流中的至少一个栅极指 与活动区域接触。 一个实施例具有至少一个门指的至少一端延伸到有源区的外部。 另一个实施例包括与所述至少一个源手指成一体的至少一个源极场板。 所述至少一个源极场板在所述至少一个栅极指状物上延伸,所述至少一个栅极指包括有源区域外部的部分。 任何一个实施例还可以包括倾斜门脚,以进一步改善高压操作。

    METHODS FOR FABRICATING HIGH VOLTAGE FIELD EFFECT TRANSITOR FINGER TERMINATIONS
    8.
    发明申请
    METHODS FOR FABRICATING HIGH VOLTAGE FIELD EFFECT TRANSITOR FINGER TERMINATIONS 有权
    用于制造高电压场效应晶体管指尖的方法

    公开(公告)号:US20130280877A1

    公开(公告)日:2013-10-24

    申请号:US13795986

    申请日:2013-03-12

    IPC分类号: H01L29/66

    摘要: Methods for fabricating a field effect transistor having at least one structure configured to redistribute and/or reduce an electric field from gate finger ends are disclosed. The methods provide field effect transistors that each include a substrate, an active region disposed on the substrate, at least one source finger in contact with the active region, at least one drain finger in contact with the active region, and at least one gate finger in rectifying contact with the active region. One embodiment has at least one end of the at least one gate finger extending outside of the active region. At least one method includes etching at least one gate channel into the passivation layer with a predetermined slope that reduces electric fields at a gate edge. Other methods include steps for fabricating a sloped gate foot, a round end, and/or a chamfered end to further improve high voltage operation.

    摘要翻译: 公开了制造具有至少一种结构的场效应晶体管的方法,该结构被配置为重新分布和/或减少栅极指末端的电场。 这些方法提供场效应晶体管,其各自包括衬底,设置在衬底上的有源区,与有源区接触的至少一个源极指,与有源区接触的至少一个漏极指,以及至少一个栅极指 与活性区域整流接触。 一个实施例具有至少一个门指的至少一端延伸到有源区的外部。 至少一种方法包括以预定斜率将至少一个栅极通道蚀刻到钝化层中,该斜率减小栅极边缘处的电场。 其他方法包括用于制造倾斜门脚,圆端和/或倒角端的步骤,以进一步改善高压操作。