Abstract:
A power off delay circuit includes a switch connected between an external power input terminal and an internal power supply terminal, a capacitor connected to the internal power supply terminal, and a hysteresis comparator to switch the switch according to the voltages of the external power input terminal and the internal power supply terminal. During on-time of the switch, the external power input terminal is connected to the internal power supply terminal and the capacitor can be charged by the external power source. When the switch is off, the capacitor provides electric power for an internal circuit. Application of the power off delay circuit to an audio system may eliminate the turn-off pops of the audio system.
Abstract:
A voltage converting controller is applied to a switching voltage converting circuit, in which the voltage converting controller periodically operates a high-side power switch and a low-side power switch in the switching voltage converting circuit with a high-side control signal and a low-side control signal, respectively, so as to convert an input voltage into an output voltage via an inductor. Defining an ideal duty cycle as the rating value of the output voltage divided by the value of the input voltage, when the ideal duty cycle is less than one threshold duty cycle, then the period of the high-side control signal is a constant; and when the ideal duty cycle is greater than the threshold duty cycle, the period of the high-side control signal and the period of the ideal duty cycle are positively correlated.
Abstract:
An over-voltage protection circuit is applied to a switching voltage converting circuit. The switching voltage converting circuit manipulates an upper bridge power switch in the circuit, so as to convert an input voltage into an output voltage by an inductor. A channel of the upper bridge power switch and the inductor are coupled to a phase end. The over-voltage protection circuit includes: a comparator, coupled to the switching voltage converting circuit, wherein when a voltage of the phase end is higher than a voltage limiting threshold, an output end of the comparator outputs a first voltage level; and a pulse width detection unit, coupled to the output end of the comparator, wherein when the output end of the comparator remains the first voltage level for a time period longer than a protection period, the pulse width detection unit outputs an over-voltage protection activation signal.
Abstract:
An over-voltage protection circuit is applied to a switching voltage converting circuit. The switching voltage converting circuit manipulates an upper bridge power switch in the circuit, so as to convert an input voltage into an output voltage by an inductor. A channel of the upper bridge power switch and the inductor are coupled to a phase end. The over-voltage protection circuit includes: a comparator, coupled to the switching voltage converting circuit, wherein when a voltage of the phase end is higher than a voltage limiting threshold, an output end of the comparator outputs a first voltage level; and a pulse width detection unit, coupled to the output end of the comparator, wherein when the output end of the comparator remains the first voltage level for a time period longer than a protection period, the pulse width detection unit outputs an over-voltage protection activation signal.
Abstract:
A level shifter includes an input stage circuit, a latch circuit and a transient speed-up circuit. The input stage circuit receives an input signal. The latch circuit is coupled to the input stage circuit through a first output terminal and a second output terminal, and determining steady-state levels of the first and the second output terminals according to the input signal. The transient speed-up circuit is coupled to the first and the second output terminals. When the transient speed-up circuit determines the first and the second output terminals are at the same logic level, the transient speed-up circuit accelerates the positive edge transition of the first or the second terminals.
Abstract:
A level shifter includes an input stage circuit, a latch circuit and a transient speed-up circuit. The input stage circuit receives an input signal. The latch circuit is coupled to the input stage circuit through a first output terminal and a second output terminal, and determining steady-state levels of the first and the second output terminals according to the input signal. The transient speed-up circuit is coupled to the first and the second output terminals. When the transient speed-up circuit determines the first and the second output terminals are at the same logic level, the transient speed-up circuit accelerates the positive edge transition of the first or the second terminals.