ELECTRONIC DEVICE HAVING MULTIPLE SPEAKERS CONTROLLED BY A SINGLE FUNCTIONAL CHIP

    公开(公告)号:US20240430618A1

    公开(公告)日:2024-12-26

    申请号:US18827834

    申请日:2024-09-08

    Abstract: An electronic device includes two speakers, a single functional chip, a parameter extraction circuit, an audio processing module, a gain adjusting circuit and a current detecting unit. The current detecting unit is disposed in the functional chip for detecting the driving current of the two speakers. The functional chip provides the driving voltage of the two speakers based on an output signal and converts the analogue current/voltages of the two speakers into digital current/voltages. The parameter extraction circuit acquires the parameter of each speaker based on the digital current/voltages. The audio processing module acquires the gains of various physical quantities based on the parameter of each speaker and determines the final gain of each physical quantity. The gain adjusting circuit provides the output signal by adjusting the gain of an input signal based on the final gain of each physical quantity.

    Multilevel Buck Converter with Valley Current Mode Control and Dual Slope Compensation

    公开(公告)号:US20240413749A1

    公开(公告)日:2024-12-12

    申请号:US18241232

    申请日:2023-08-31

    Abstract: A multilevel buck converter includes a plurality of switches, an inductor, a flying capacitor, and a control circuit. The plurality of switches are coupled between an input terminal and a ground. The input terminal has an input voltage. The inductor is coupled between the plurality of switches and an output terminal for generating an inductor-current signal. The flying capacitor is coupled to the plurality of switches for generating a flying capacitor voltage. The control circuit is coupled to the output terminal and the plurality of switches for generating a plurality of switching signals according a feedback voltage and the inductor-current signal. The control circuit operates in a valley current mode with dual slope compensation.

    Battery Pack and Current Monitoring Method Thereof

    公开(公告)号:US20240077543A1

    公开(公告)日:2024-03-07

    申请号:US18132427

    申请日:2023-04-10

    CPC classification number: G01R31/3842 H01M50/204

    Abstract: A battery pack includes a group of cells, a current path switch coupled to the group of cells, and a current monitoring system. The current monitoring system includes a signal detection unit, a logic unit and a current path control unit. The signal detection unit is coupled to the group of cells and/or a positive terminal of the battery pack, and used to detect at least one voltage signal of the group of cells and/or of the positive terminal of the battery pack. The logic unit is coupled to the signal detection unit, and used to generate a calculated value of a voltage signal of the at least one voltage signal and generate a logic signal according to the calculated value. The current path control unit is coupled to the logic unit and the current path switch, and used to control the current path switch according to the logic signal.

    POWER CONVERTER PREVENTING OVERVOLTAGE DAMAGE AND CONTROL METHOD THEREOF

    公开(公告)号:US20230336074A1

    公开(公告)日:2023-10-19

    申请号:US18123961

    申请日:2023-03-20

    CPC classification number: H02M3/07 H02M1/0012

    Abstract: A power converter includes first to fourth switches, a flying capacitor, an inductor, an output capacitor and a control circuit. The first to fourth switches are sequentially coupled in cascode. The first switch is used to receive an input voltage. The flying capacitor is coupled across the second switch and the third switch, the inductor is coupled to the second switch, the third switch and the output capacitor. The output capacitor is used to output an output voltage. When the input voltage is less than an input voltage threshold, the control circuit is used to switch the first to fourth switches according to a resonant frequency. When the input voltage exceeds the input voltage threshold, the control circuit switch is used to the first to fourth switches according to a regulated frequency exceeding the resonant frequency.

    Self-calibrating timing generator

    公开(公告)号:US11683025B1

    公开(公告)日:2023-06-20

    申请号:US17849747

    申请日:2022-06-27

    CPC classification number: H03K3/017 H03K3/037 H03K5/24 H03K19/20

    Abstract: A timing generator includes a first current source, a first switch, a second current source, a second switch, a third switch, a capacitor, a signal synthesizer, and a timing difference extractor. The first current source is for generating a first current according to the input voltage. The second current source is for generating a second current according to the input voltage. The first switch includes a control terminal for receiving a charging signal. The second switch includes a control terminal for receiving a timing difference signal. The third switch includes a control terminal for receiving a reset signal. The capacitor is coupled between a charging terminal and a ground terminal. The signal synthesizer is for generating a timing signal according to a charging voltage and a reference voltage. The timing difference extractor is for generating a timing difference signal according to the timing signal and a deformed timing signal.

    High Resolution Dimmer Circuit
    7.
    发明公开

    公开(公告)号:US20230141723A1

    公开(公告)日:2023-05-11

    申请号:US17973526

    申请日:2022-10-25

    CPC classification number: H05B45/325 H05B45/10

    Abstract: A dimmer circuit includes a light emitting module, a first current source, a digital-to-analog converter, a switch, a second current source and a pulse width modulation generator. The light emitting module is for emitting light according to a driving current. The first current source includes a first terminal coupled to a second terminal of the light emitting module. The digital-to-analog converter is for generating a DC voltage according to a DC dimming code signal to control the first current source. The switch includes a first terminal coupled to a second terminal of the light emitting module. The second current source includes a first terminal coupled to a second terminal of the switch. The PWM generator is for generating a PWM voltage according to the PWM dimming code signal to control the second current source.

    USB TYPE-C CABLE AND METHOD FOR READING/WRITING A CHIP IN A USB TYPE-C CABLE
    10.
    发明申请
    USB TYPE-C CABLE AND METHOD FOR READING/WRITING A CHIP IN A USB TYPE-C CABLE 有权
    USB TYPE-C电缆和用于在USB TYPE-C电缆中读取/写入芯片的方法

    公开(公告)号:US20160217307A1

    公开(公告)日:2016-07-28

    申请号:US14978819

    申请日:2015-12-22

    Abstract: A method for reading/writing a chip in a USB type-C cable comprises converting a read/write command into unstructured vendor defined message (UVDM) that is conforming to a USB power delivery specification. Such UVDM will be delivered to the chip via a type-C configuration channel interface. The chip analyzes the UVDM to acquire the read/write command and reads or modifies the content of a non-volatile memory in the chip according to the read/write command. Due to use of the type-C configuration channel interface, which is inherent in the USB type-C cable, to read/write the chip, it needs no extra interface which otherwise increases costs.

    Abstract translation: 用于在USB C型电缆中读取/写入芯片的方法包括将读/写命令转换成符合USB功率传递规范的非结构化供应商定义消息(UVDM)。 这样的UVDM将通过C类配置通道接口传送到芯片。 该芯片分析UVDM以获取读/写命令,并根据读/写命令读取或修改芯片中的非易失性存储器的内容。 由于使用USB C型电缆固有的C型配置通道接口来读/写芯片,因此不需要额外的接口,否则会增加成本。

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