DIRECT CURRENT BUS VOLTAGE CONTROL

    公开(公告)号:US20220285935A1

    公开(公告)日:2022-09-08

    申请号:US17193854

    申请日:2021-03-05

    Abstract: For Direct Current (DC) bus voltage control, a method generates a q-axis reference current from a DC voltage error that includes a DC voltage input modified by a DC bus voltage in a closed outer loop. The method further generates a d-axis reference current from the DC voltage error, wherein the second-order harmonic in the d-axis reference current is delayed from that in q-axis reference current by 90 degrees. The method generates a q-axis current from the q-axis reference current. The method generates a d-axis current from the d-axis reference current. The second-order harmonic in d-axis current is offset from the second-order harmonic in q-axis current by 90 degrees. The method controls the DC bus voltage of a voltage control plant to mitigate a second-order harmonic in the DC bus voltage with the second-order harmonics in the q-axis current and the d-axis current.

    PHASE LOCK LOOP WITH CASCADE TRACKING FILTERS FOR SYNCHRONIZING AN ELECTRIC GRID
    4.
    发明申请
    PHASE LOCK LOOP WITH CASCADE TRACKING FILTERS FOR SYNCHRONIZING AN ELECTRIC GRID 有权
    用于同步电网的CASCADE跟踪滤波器的相位锁定环

    公开(公告)号:US20150381187A1

    公开(公告)日:2015-12-31

    申请号:US14319469

    申请日:2014-06-30

    CPC classification number: H02J3/01 H02J3/48 Y02E40/40

    Abstract: Present embodiments relate to a method for synchronizing an electric grid. The method includes receiving a phase voltage of the electric grid. The method further includes determining one or more disturbance frequencies in the phase voltage via a plurality of sequential tracking filters, wherein each of the plurality of tracking filters corresponds to a harmonic of the received phase voltage. The method further includes removing the disturbance frequencies components sequentially to produce a minimally distorted frequency, and performing a PLL operation on the clean frequency to determine a phase angle of the frequency.

    Abstract translation: 本实施例涉及一种同步电网的方法。 该方法包括接收电网的相电压。 该方法还包括经由多个顺序跟踪滤波器来确定相电压中的一个或多个扰动频率,其中多个跟踪滤波器中的每一个对应于接收相电压的谐波。 该方法还包括顺序地去除干扰频率分量以产生最小失真的频率,以及对干净频率执行PLL操作以确定频率的相位角。

    POWER CONVERTER CONTROL SYSTEM OBSERVER
    5.
    发明申请

    公开(公告)号:US20200228024A1

    公开(公告)日:2020-07-16

    申请号:US16834719

    申请日:2020-03-30

    Abstract: A system may include a power converter and a control system communicatively coupled to the power converter. The control system may determine a first DC voltage associated with the DC bus based on one or more DC external capacitance values that correspond to one or more loads coupled to the power converter. The control system may also determine a second DC voltage associated with the DC bus based on a capacitance of a system in which the power converter operates. The control system may also determine a third DC voltage associated with the DC bus based on the first DC voltage and the second DC voltage and adjust an operation of the power converter based on the third DC voltage.

    Direct current bus voltage control

    公开(公告)号:US11631975B2

    公开(公告)日:2023-04-18

    申请号:US17193854

    申请日:2021-03-05

    Abstract: For Direct Current (DC) bus voltage control, a method generates a q-axis reference current from a DC voltage error that includes a DC voltage input modified by a DC bus voltage in a closed outer loop. The method further generates a d-axis reference current from the DC voltage error, wherein the second-order harmonic in the d-axis reference current is delayed from that in q-axis reference current by 90 degrees. The method generates a q-axis current from the q-axis reference current. The method generates a d-axis current from the d-axis reference current. The second-order harmonic in d-axis current is offset from the second-order harmonic in q-axis current by 90 degrees. The method controls the DC bus voltage of a voltage control plant to mitigate a second-order harmonic in the DC bus voltage with the second-order harmonics in the q-axis current and the d-axis current.

    Dynamic resonance control for grid-tied power converters

    公开(公告)号:US11177732B1

    公开(公告)日:2021-11-16

    申请号:US17013175

    申请日:2020-09-04

    Abstract: A component includes an adaptive estimator. A converter includes a switching rectifier connected to an LCL filter with a converter inductor, a capacitor, and grid inductor connected to a voltage source through a conductor with unknown inductance. Current of the converter inductor is input to the adaptive estimator which includes an ideal LCL filter model that generates, using a simple filter, a desired dynamic behavior of the converter and LCL filter and a disturbance compensator. An LCL steady-state (“SS”) compensation models a steady-state effect of the LCL filter and conductor. Output of the adaptive estimator is subtracted from output of the LCL SS compensation to form a disturbance estimate, which is summed with a feedback loop output of the converter to form a voltage control signal that controls switching of the switching rectifier. The voltage control signal is summed with the disturbance estimate and is input to the adaptive estimator.

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