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公开(公告)号:US08909849B2
公开(公告)日:2014-12-09
申请号:US12946612
申请日:2010-11-15
CPC分类号: G11C13/0004 , G06F2213/0038 , G11C7/1039 , G11C13/0061 , G11C13/0069
摘要: An apparatus for data storage is presented. In one embodiment, the apparatus includes a phase change memory device comprising phase change memory storage elements. The apparatus further includes control logic to control two or more set pipelines to serve memory requests in a staggered manner, such that set operations of the memory requests begin at different times.
摘要翻译: 提出了一种用于数据存储的设备。 在一个实施例中,该装置包括包括相变存储器存储元件的相变存储器件。 该装置还包括控制逻辑以控制两个或更多个集合管线以交错方式提供存储器请求,使得存储器请求的设置操作在不同时间开始。
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公开(公告)号:US20120120722A1
公开(公告)日:2012-05-17
申请号:US12946612
申请日:2010-11-15
IPC分类号: G11C11/21
CPC分类号: G11C13/0004 , G06F2213/0038 , G11C7/1039 , G11C13/0061 , G11C13/0069
摘要: An apparatus for data storage is presented. In one embodiment, the apparatus includes a phase change memory device comprising phase change memory storage elements. The apparatus further includes control logic to control two or more set pipelines to serve memory requests in a staggered manner, such that set operations of the memory requests begin at different times.
摘要翻译: 提出了一种用于数据存储的设备。 在一个实施例中,该装置包括包括相变存储器存储元件的相变存储器件。 该装置还包括控制逻辑以控制两个或更多个集合管线以交错方式提供存储器请求,使得存储器请求的设置操作在不同时间开始。
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公开(公告)号:US08765581B2
公开(公告)日:2014-07-01
申请号:US13472053
申请日:2012-05-15
申请人: Jong Won Lee , Gianpaolo Spadini , Derchang Kau
发明人: Jong Won Lee , Gianpaolo Spadini , Derchang Kau
IPC分类号: H01L21/20
CPC分类号: H01L27/2463 , H01L27/2427 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/144 , H01L45/1608 , H01L45/1675
摘要: Subject matter disclosed herein relates to a memory device, and more particularly to a self-aligned cross-point phase change memory-switch array and methods of fabricating same.
摘要翻译: 本文公开的主题涉及存储器件,更具体地涉及自对准交叉点相变存储器开关阵列及其制造方法。
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公开(公告)号:US08289762B2
公开(公告)日:2012-10-16
申请号:US12589977
申请日:2009-10-30
申请人: Derchang Kau , Johannes J. Kalb , Brett Klehn
发明人: Derchang Kau , Johannes J. Kalb , Brett Klehn
CPC分类号: G11C13/0004 , G11C13/0064 , G11C13/0069 , G11C2013/0052 , G11C2013/008 , G11C2013/0092
摘要: Double-pulse write for phase change memory including: writing a phase change material from a high RESET state to a weakened RESET state with a first step, writing the phase change material from the weakened RESET state to a SET state with a second step, the second step having a lower current than the first step, verifying a parameter of the phase change material wherein if the parameter is higher than a target for a SET state, then repeating the writing with the first step, the writing with the second step, and the verifying until the parameter is lower than the target wherein a current for the first step is decreased by a decrement with each iteration without becoming lower than a current for the second step.
摘要翻译: 用于相变存储器的双脉冲写入包括:通过第一步将相位改变材料从高RESET状态写入弱化的RESET状态,将相变材料从弱化的RESET状态写入到第二步的SET状态, 第二步骤具有比第一步骤低的电流,验证相变材料的参数,其中如果参数高于用于SET状态的目标,则重复第一步骤的写入,用第二步骤的写入,以及 直到参数低于目标的验证,其中第一步骤的电流通过每次迭代而减小递减而不降低到用于第二步骤的电流。
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公开(公告)号:US20120225534A1
公开(公告)日:2012-09-06
申请号:US13472053
申请日:2012-05-15
申请人: Jong Won Lee , Gianpaolo Spadini , Derchang Kau
发明人: Jong Won Lee , Gianpaolo Spadini , Derchang Kau
IPC分类号: H01L45/00
CPC分类号: H01L27/2463 , H01L27/2427 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/144 , H01L45/1608 , H01L45/1675
摘要: Subject matter disclosed herein relates to a memory device, and more particularly to a self-aligned cross-point phase change memory-switch array and methods of fabricating same.
摘要翻译: 本文公开的主题涉及存储器件,更具体地涉及自对准交叉点相变存储器开关阵列及其制造方法。
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公开(公告)号:US08081506B2
公开(公告)日:2011-12-20
申请号:US12637358
申请日:2009-12-14
申请人: Charles C. Kuo , Derchang Kau
发明人: Charles C. Kuo , Derchang Kau
IPC分类号: G11C11/00
CPC分类号: G11C11/40 , G11C13/0004 , G11C14/009 , G11C2213/15 , H01L27/2436 , H01L45/04
摘要: A voltage memory switch may be formed of an amorphous semiconductor threshold switch and a select device. The amorphous threshold switch may be latched into one of two different current conducting levels. Then, in some embodiments, a relatively dense memory array can be achieved by maintaining an appropriate bias on the cell to prevent it from losing the programmed state.
摘要翻译: 电压存储器开关可以由非晶半导体阈值开关和选择器件形成。 非晶态阈值开关可以被锁存在两个不同的电流传导电平之一中。 然后,在一些实施例中,可以通过在单元上保持适当的偏置来防止其失去编程状态来实现相对密集的存储器阵列。
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公开(公告)号:US07751226B2
公开(公告)日:2010-07-06
申请号:US11880934
申请日:2007-07-25
申请人: Derchang Kau
发明人: Derchang Kau
IPC分类号: G11C11/00
CPC分类号: G11C13/003 , G11C13/0004 , G11C13/004 , G11C2013/0052 , G11C2213/15 , G11C2213/76
摘要: A phase change memory including a threshold device, such as an ovonic threshold switch, and a storage device may be read. Reading the cell may involve applying a first voltage to a selected cell and then a second voltage, lower than the first voltage. The first voltage may be sufficient to threshold the ovonic threshold switch if the storage device is in the set state.
摘要翻译: 可以读取包括诸如椭圆形阈值开关的阈值装置和存储装置的相变存储器。 读取单元可以包括将第一电压施加到所选择的单元,然后施加低于第一电压的第二电压。 如果存储设备处于设置状态,则第一电压可能足以限制超声阈值切换。
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公开(公告)号:US20090256133A1
公开(公告)日:2009-10-15
申请号:US12082137
申请日:2008-04-09
CPC分类号: G11C5/02 , G11C13/0004 , G11C2213/71 , H01L27/2481 , H01L45/141 , H01L45/145
摘要: A resistive memory cell may be composed of four stacked layers. Each layer may be sandwiched by electrodes. Connections may be formed from each of four directions around the stack, for example, aligned with each of four edges where the resistive layers are rectangular.
摘要翻译: 电阻式存储单元可以由四个堆叠层组成。 每个层可以被电极夹在中间。 可以从堆叠周围的四个方向中的每一个形成连接,例如,与电阻层为矩形的四个边缘中的每一个对准。
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公开(公告)号:US08385100B2
公开(公告)日:2013-02-26
申请号:US12653092
申请日:2009-12-08
申请人: Derchang Kau , Johannes Kalb , Elijah Karpov , Gianpaolo Spadini
发明人: Derchang Kau , Johannes Kalb , Elijah Karpov , Gianpaolo Spadini
IPC分类号: G11C11/00
CPC分类号: G11C13/0004 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C2013/008 , G11C2213/76
摘要: Embodiments of apparatus and methods for an energy efficient set write of phase change memory with switch are generally described herein. Other embodiments may be described and claimed.
摘要翻译: 这里通常描述用于具有开关的相变存储器的能量效率设置写入的装置和方法的实施例。 可以描述和要求保护其他实施例。
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公开(公告)号:US20110103139A1
公开(公告)日:2011-05-05
申请号:US12589977
申请日:2009-10-30
申请人: Derchang Kau , Johannes Kalb , Brett Klehn
发明人: Derchang Kau , Johannes Kalb , Brett Klehn
CPC分类号: G11C13/0004 , G11C13/0064 , G11C13/0069 , G11C2013/0052 , G11C2013/008 , G11C2013/0092
摘要: The present invention discloses a method including: writing a phase change material from a high RESET state to a weakened RESET state with a first step; writing the phase change material from the weakened RESET state to a SET state with a second step, the second step having a lower current than the first step; verifying a parameter of the phase change material wherein if the parameter is higher than a target for a SET state, then repeating the writing with the first step, the writing with the second step, and the verifying until the parameter is lower than the target wherein a current for the first step is decreased by a decrement with each iteration without becoming lower than a current for the second step.
摘要翻译: 本发明公开了一种方法,其特征在于包括:将相位变化材料从高RESET状态写入弱化的RESET状态,第一步骤; 将所述相变材料从弱化的RESET状态写入到具有第二步骤的SET状态,所述第二步骤具有比所述第一步骤低的电流; 验证相变材料的参数,其中如果参数高于SET状态的目标,则重复第一步的写入,用第二步进行写入,并且验证直到该参数低于该目标,其中 用于第一步骤的电流通过每次迭代减小递减而不降低第二步骤的电流。
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