Method and system to improve prefetching operations
    1.
    发明授权
    Method and system to improve prefetching operations 失效
    改进预取操作的方法和系统

    公开(公告)号:US06978351B2

    公开(公告)日:2005-12-20

    申请号:US10335424

    申请日:2002-12-30

    IPC分类号: G06F12/00 G06F12/08 G06F13/42

    CPC分类号: G06F13/4243

    摘要: To reduce prefetch overshoot when prefetching partial data sets along the path from input-output bus to system memory, a prefetch field is used to communicate the amount of data that a prefetching entity upstream may prefetch. Utilizing a prefetch field in such a manner reduces the fetching of unneeded data past the end of the requested data, resulting in overall increased system performance.

    摘要翻译: 为了在沿着从输入 - 输出总线到系统存储器的路径预取部分数据集时减少预取过冲,使用预取字段来传送预取实体上游可能预取的数据量。 以这种方式利用预取字段减少了在所请求的数据的结尾之后提取不需要的数据,导致整体上提高的系统性能。

    Driver Transparent Message Signaled Interrupts
    2.
    发明申请
    Driver Transparent Message Signaled Interrupts 有权
    驱动程序透明消息信号中断

    公开(公告)号:US20100095038A1

    公开(公告)日:2010-04-15

    申请号:US12636027

    申请日:2009-12-11

    申请人: Joseph A. Bennett

    发明人: Joseph A. Bennett

    IPC分类号: G06F13/24

    CPC分类号: G06F13/4291 G06F13/24

    摘要: Machine-readable media, methods, and apparatus are described to issue message signaled interrupts. In some disclosed embodiments, a device generates message signaled interrupts in a manner that enables a device driver written with level-sensitive semantics to properly service the device despite the edge-triggered characteristics message signaled interrupts.

    摘要翻译: 描述机器可读介质,方法和装置以发出消息信号中断。 在一些公开的实施例中,设备以使得能够写入具有水平敏感语义的设备驱动器正确地服务该设备的方式生成消息信号中断,尽管边缘触发特性消息被指示中断。

    Mapping of interconnect configuration space
    3.
    发明授权
    Mapping of interconnect configuration space 失效
    映射互连配置空间

    公开(公告)号:US06907510B2

    公开(公告)日:2005-06-14

    申请号:US10114661

    申请日:2002-04-01

    IPC分类号: G06F9/455 G06F12/02 G06F12/10

    CPC分类号: G06F12/0292

    摘要: A method for accessing a configuration data space for a device connected to a processor through an interconnect includes receiving a request from the processor to access the processor's addressable space. The request is generated in response to receiving an instruction intended to access the device's configuration data space. A map between the device's configuration data space and the processor's addressable space is accessed, the map having previously mapped the device's configuration data space to one or more pages of the processor's addressable space. Using the map, the request from the processor is translated into a configuration cycle on the interconnect to access the device's configuration data space.

    摘要翻译: 通过互连来访问与处理器连接的设备的配置数据空间的方法包括从处理器接收访问处理器的可寻址空间的请求。 响应于接收到用于访问设备的配置数据空间的指令而产生该请求。 访问设备的配置数据空间和处理器的可寻址空间之间的映射,映射先前已将设备的配置数据空间映射到处理器可寻址空间的一个或多个页面。 使用该映射,将来自处理器的请求转换为互连上的配置周期以访问设备的配置数据空间。

    Hardware assisted ATA command queuing
    4.
    发明授权
    Hardware assisted ATA command queuing 有权
    硬件辅助ATA命令排队

    公开(公告)号:US06901461B2

    公开(公告)日:2005-05-31

    申请号:US10334840

    申请日:2002-12-31

    申请人: Joseph A. Bennett

    发明人: Joseph A. Bennett

    摘要: One embodiment involves having a processor writing disk drive command information for a number of data transactions to cacheable system memory. The processor then performs a single write transaction to a disk drive host controller. The disk drive host controller then causes a DMA transfer to occur which reads the command information located in system memory and stores the command information in a queue. Once the host controller has the command information, it programs the disk drive with information corresponding to a queue entry over a serial interconnect. The disk drive signals an interrupt after it processes the command information. The disk drive host controller does not forward the interrupt to the processor, but services the interrupt itself. The disk drive host controller reads from the disk drive to determine the disk drive status. The disk drive can signal that it is ready to execute the programmed command, or it can signal that it is not ready to perform the programmed command but is ready to receive additional command programming information corresponding to another queue entry, or it may signal that it is ready to execute a previously programmed command. The disk drive host controller then performs the required operations using the information stored in the queue without involving the processor. Because the processor is only involved in setting up a command block in system memory and in signaling the disk drive host controller that the command block is ready for reading, the processor is freed up to perform other tasks and overall system performance is improved.

    摘要翻译: 一个实施例涉及将处理器将用于多个数据事务的磁盘驱动器命令信息写入可高速缓存的系统存储器。 然后,处理器对磁盘驱动器主机控制器执行单个写入事务。 然后,磁盘驱动器主机控制器发生DMA传输,其中读取位于系统存储器中的命令信息,并将命令信息存储在队列中。 一旦主机控制器具有命令信息,它将通过串行互连对具有与队列条目相对应的信息来对磁盘驱动器进行编程。 磁盘驱动器在处理命令信息后发出中断信号。 磁盘驱动器主机控制器不会将中断转发给处理器,而是自动为中断服务。 磁盘驱动器主机控制器从磁盘驱动器读取以确定磁盘驱动器状态。 磁盘驱动器可以指示它准备好执行编程的命令,或者它可以发信号通知它没有准备好执行编程的命令,但是准备好接收与另一个队列条目相对应的附加命令编程信息,或者它可以发信号 准备执行以前编程的命令。 然后,磁盘驱动器主机控制器使用存储在队列中的信息来执行所需的操作,而不涉及处理器。 由于处理器仅涉及在系统存储器中设置命令块,并且在向盘驱动器主机控制器发信号通知命令块准备好进行读取时,处理器将被释放以执行其他任务,并提高整体系统性能。

    System and method of determining the source of a codec
    5.
    发明授权
    System and method of determining the source of a codec 失效
    确定编解码器源的系统和方法

    公开(公告)号:US06820141B2

    公开(公告)日:2004-11-16

    申请号:US09967809

    申请日:2001-09-28

    申请人: Joseph A. Bennett

    发明人: Joseph A. Bennett

    IPC分类号: G06F1300

    CPC分类号: G06F13/385

    摘要: A system and method to determine a port that a codec is attached is disclosed. An access will be attempted to a codec, and the internal hardware of the host will watch which input port the response comes in on, and log that port for the software. Software can then map that input port to direct memory access/addressing engines in the host such that data streams can be steered to the appropriate application.

    摘要翻译: 公开了一种用于确定附接有编解码器的端口的系统和方法。 将尝试访问编解码器,并且主机的内部硬件将监视响应所在的输入端口,并记录该软件的端口。 然后,软件可以将该输入端口映射到主机中的直接存储器访问/寻址引擎,使得数据流可以被引导到适当的应用。

    Forwarding causes of non-maskable interrupts to the interrupt handler
    6.
    发明授权
    Forwarding causes of non-maskable interrupts to the interrupt handler 失效
    向中断处理程序转发不可屏蔽中断的原因

    公开(公告)号:US06170033A

    公开(公告)日:2001-01-02

    申请号:US08940232

    申请日:1997-09-30

    申请人: Joseph A. Bennett

    发明人: Joseph A. Bennett

    IPC分类号: G06F946

    CPC分类号: G06F13/24

    摘要: The present invention relates to a method and apparatus for directing causes of non-maskable interrupts. The apparatus determines whether a computer system is designed to handle an alternative interrupt such as a SCI interrupt. If the system is capable of handling alternative interrupts, forwarding circuitry forwards the causes of non-maskable interrupts to an alternative interrupt handler. If the system is not capable of handling alternative interrupts, the apparatus forwards the cause of non-maskable interrupts to a NMI handler.

    摘要翻译: 本发明涉及一种用于指示不可屏蔽中断的原因的方法和装置。 该装置确定计算机系统是否被设计为处理诸如SCI中断的替代中断。 如果系统能够处理替代中断,则转发电路将不可屏蔽中断的原因转发给另一个中断处理程序。 如果系统不能处理替代中断,则该设备将不可屏蔽中断的原因转发给NMI处理程序。

    Method and apparatus of collecting timer ticks
    7.
    发明授权
    Method and apparatus of collecting timer ticks 有权
    收集定时滴答的方法和装置

    公开(公告)号:US07886177B2

    公开(公告)日:2011-02-08

    申请号:US11616667

    申请日:2006-12-27

    摘要: Described within is a power management system for a computing platform that provides additional reductions in power consumption from that provided by only periodically putting the CPU or peripheral devices in low power non-operational states. In particular, the embodiment prevents the OS from generating an interrupt due to timer ticks while in a non-C0 state, until such time as a number of timer ticks have been gathered.

    摘要翻译: 内部描述的是用于计算平台的电源管理系统,其提供额外的功率消耗降低,仅由周期性地将CPU或外围设备置于低功率非操作状态。 特别地,该实施例在非C0状态期间防止OS由于定时器计时而产生中断,直到已经收集到定时器滴答数的时间为止。

    Driver transparent message signaled interrupts
    8.
    发明申请
    Driver transparent message signaled interrupts 有权
    驱动程序透明信息发出中断信号

    公开(公告)号:US20080263250A1

    公开(公告)日:2008-10-23

    申请号:US12214662

    申请日:2008-06-20

    申请人: Joseph A. Bennett

    发明人: Joseph A. Bennett

    IPC分类号: G06F13/24

    CPC分类号: G06F13/4291 G06F13/24

    摘要: Machine-readable media, methods, and apparatus are described to issue message signaled interrupts. In some disclosed embodiments, a device generates message signaled interrupts in a manner that enables a device driver written with level-sensitive semantics to properly service the device despite the edge-triggered characteristics message signaled interrupts.

    摘要翻译: 描述机器可读介质,方法和装置以发出消息信号中断。 在一些公开的实施例中,设备以使得能够写入具有水平敏感语义的设备驱动器正确地服务该设备的方式生成消息信号中断,尽管边缘触发特性消息被指示中断。

    Processing replies to request packets in an advanced switching context
    9.
    发明授权
    Processing replies to request packets in an advanced switching context 有权
    处理在高级切换环境中回复请求数据包

    公开(公告)号:US07260661B2

    公开(公告)日:2007-08-21

    申请号:US10934640

    申请日:2004-09-03

    IPC分类号: G06F13/42

    CPC分类号: H04L47/10 H04L47/39

    摘要: An apparatus communicates with an advanced switching (AS) fabric. The apparatus includes a transmit engine that generates a request packet for transmission to the AS fabric. The transmit engine associates a first transaction identifier with the request packet. A receive engine receives a reply packet in response to the request packet. The reply packet contains a second transaction identifier. The receive engine compares the first transaction identifier to the second transaction identifier. If the first transaction identifier matches the second transaction identifier, the receive engine decides to store data from the reply packet at an address associated with the first transaction identifier.

    摘要翻译: 设备与高级交换(AS)结构进行通信。 该装置包括发送引擎,其生成用于传输到AS结构的请求分组。 发送引擎将第一事务标识符与请求分组相关联。 接收引擎响应于请求分组接收应答分组。 应答包包含第二个事务标识符。 接收引擎将第一事务标识符与第二事务标识符进行比较。 如果第一事务标识符与第二事务标识符匹配,则接收引擎决定将来自应答分组的数据存储在与第一事务标识符相关联的地址处。

    Detecting insertion of removable media

    公开(公告)号:US07130992B2

    公开(公告)日:2006-10-31

    申请号:US09822684

    申请日:2001-03-30

    IPC分类号: G06F9/00

    摘要: The present invention is a method and system to automatic loading program on a medium into memory for execution. In one embodiment, a mode word is configured. The insertion of the medium into a drive is detected based on the mode word. A program on the medium is started when insertion is detected. In another embodiment, a polling circuit in a chipset detects the insertion of the medium into the drive. A status bit is checked in response to an interrupt generated by the polling circuit. A flag in a memory is updated based on the status bit. A poll request by an operating system is responded.