Digital analog dither adjustment
    1.
    发明授权

    公开(公告)号:US10348321B2

    公开(公告)日:2019-07-09

    申请号:US15722265

    申请日:2017-10-02

    Abstract: A method and system for data conversion includes an analog noise generator to generate a random, non-deterministic, analog noise signal. An adder adds the analog noise signal to an analog RF signal to produce a dithered analog signal. A first quantizer converts the analog noise signal to digital to produce a digital noise signal. A second quantizer converts the dithered analog signal to a digital equivalent signal. A digital dither adjustment module removes amplitude measurements of the digital noise signal from the digital equivalent signal to obtain a linearized digital representation of the analog RF signal.

    DIGITAL ANALOG DITHER ADJUSTMENT
    2.
    发明申请

    公开(公告)号:US20190103877A1

    公开(公告)日:2019-04-04

    申请号:US15722265

    申请日:2017-10-02

    Abstract: A method and system for data conversion includes an analog noise generator to generate a random, non-deterministic, analog noise signal. An adder adds the analog noise signal to an analog RF signal to produce a dithered analog signal. A first quantizer converts the analog noise signal to digital to produce a digital noise signal. A second quantizer converts the dithered analog signal to a digital equivalent signal. A digital dither adjustment module removes amplitude measurements of the digital noise signal from the digital equivalent signal to obtain a linearized digital representation of the analog RF signal.

    Rail adaptive dither
    3.
    发明授权

    公开(公告)号:US10116322B1

    公开(公告)日:2018-10-30

    申请号:US15828566

    申请日:2017-12-01

    Abstract: A system and method of converting an analog input signal to a linearized digital representation of the analog input signal. A measure of the analog input signal is compared to a threshold associated with a maximum dynamic range of a quantizer. A maximum amplitude of a random, analog dither signal is dynamically varied for perturbing quantization of the analog input signal in response to the comparison. The dynamically varied dither signal and the analog input signal are combined to obtain a dithered input signal. The quantizer converts the dithered input signal into the linearized digital representation of the analog input signal.

    Complete complementary code parallel offsets

    公开(公告)号:US10090847B1

    公开(公告)日:2018-10-02

    申请号:US15819628

    申请日:2017-11-21

    Abstract: A system and method of converting an analog input signal to a digital output signal includes coupling an analog input signal to a plurality of analog-to-digital converters (ADCs) arranged in a parallel configuration. Pseudo-random discrete valued complementary offset voltage levels that span an input voltage range of the sum of the plurality of ADCs are generated. An amount of continuous, analog dither that randomly varies at values between the discrete offset voltage levels is generated, the analog dither being less than steps between the discrete offset voltage levels. On different clock cycles, different discrete offset voltage levels are coupled to at least some of the ADCs. At each ADC, the respectively coupled analog input, discrete offset voltage level, and continuous analog dither are quantized to obtain a digital output. The respective digital outputs are combined to obtain a linearized digital representation of the analog input signal.

    ANALOG TO DIGITAL CONVERSION USING DIFFERENTIAL DITHER

    公开(公告)号:US20190158110A1

    公开(公告)日:2019-05-23

    申请号:US15819684

    申请日:2017-11-21

    Abstract: An analog-to-digital conversion system includes two quantizers having a least significant bit arranged in a parallel pair. An input circuit coupled to the quantizers provides an analog input signal to the quantizers. A dither generator coupled to the quantizers provides an analog differential dither signal for perturbing quantization of the analog input signal. A combiner coupled to the quantizers adds respective outputs of the quantizers to obtain a linearized digital representation of the analog input signal.

    Analog to digital conversion using differential dither

    公开(公告)号:US10298256B1

    公开(公告)日:2019-05-21

    申请号:US15819684

    申请日:2017-11-21

    Abstract: An analog-to-digital conversion system includes two quantizers having a least significant bit arranged in a parallel pair. An input circuit coupled to the quantizers provides an analog input signal to the quantizers. A dither generator coupled to the quantizers provides an analog differential dither signal for perturbing quantization of the analog input signal. A combiner coupled to the quantizers adds respective outputs of the quantizers to obtain a linearized digital representation of the analog input signal.

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