公开(公告)号：US10396089B2

公开(公告)日：2019-08-27

申请号：US16200756

申请日：2018-11-27

Applicant: Renesas Electronics Corporation

Inventor： Tsutomu Okazaki ,  Daisuke Okada ,  Kyoya Nitta ,  Toshihiro Tanaka ,  Akira Kato ,  Toshikazu Matsui ,  Yasushi Ishii ,  Digh Hisamoto ,  Kan Yasui

IPC: G11C16/04 ,  H01L21/28 ,  H01L27/02 ,  H01L29/06 ,  H01L29/51 ,  H01L29/66 ,  H01L27/105 ,  H01L27/115 ,  H01L29/423 ,  H01L29/792 ,  H01L27/1157 ,  H01L27/11568

Abstract: A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.

公开(公告)号：US10910394B2

公开(公告)日：2021-02-02

申请号：US16881484

申请日：2020-05-22

Applicant: Renesas Electronics Corporation

Inventor： Tsutomu Okazaki ,  Akira Kato ,  Kan Yasui ,  Kyoya Nitta ,  Digh Hisamoto ,  Yasushi Ishii ,  Daisuke Okada ,  Toshihiro Tanaka ,  Toshikazu Matsui

IPC: H01L27/1157 ,  H01L27/105 ,  H01L29/423 ,  H01L21/28 ,  G11C16/04 ,  H01L27/02 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/66 ,  H01L29/792 ,  H01L29/06 ,  H01L29/51

Abstract: A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.

公开(公告)号：US10692878B2

公开(公告)日：2020-06-23

申请号：US16552524

申请日：2019-08-27

Applicant: Renesas Electronics Corporation

Inventor： Tsutomu Okazaki ,  Akira Kato ,  Kan Yasui ,  Kyoya Nitta ,  Digh Hisamoto ,  Yasushi Ishii ,  Daisuke Okada ,  Toshihiro Tanaka ,  Toshikazu Matsui

IPC: H01L27/1157 ,  H01L27/105 ,  H01L29/423 ,  H01L21/28 ,  G11C16/04 ,  H01L27/02 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/66 ,  H01L29/792 ,  H01L29/06 ,  H01L29/51

Abstract: A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.

公开(公告)号：US10141324B2

公开(公告)日：2018-11-27

申请号：US15581576

申请日：2017-04-28

Applicant: Renesas Electronics Corporation

Inventor： Tsutomu Okazaki ,  Daisuke Okada ,  Kyoya Nitta ,  Toshihiro Tanaka ,  Akira Kato ,  Toshikazu Matsui ,  Yasushi Ishii ,  Digh Hisamoto ,  Kan Yasui

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/792 ,  H01L27/1157 ,  H01L29/51 ,  H01L27/02 ,  H01L21/28

Abstract: A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.

公开(公告)号：US09640546B2

公开(公告)日：2017-05-02

申请号：US14609659

申请日：2015-01-30

Applicant: Renesas Electronics Corporation

Inventor： Tsutomu Okazaki ,  Daisuke Okada ,  Kyoya Nitta ,  Toshihiro Tanaka ,  Akira Kato ,  Toshikazu Matsui ,  Yasushi Ishii ,  Digh Hisamoto ,  Kan Yasui

IPC: H01L29/792 ,  H01L27/1157 ,  H01L27/105 ,  H01L29/423 ,  G11C16/04 ,  H01L21/28 ,  H01L27/02 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/66

CPC classification number: H01L27/1157 ,  G11C16/0425 ,  H01L21/28282 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/0649 ,  H01L29/4234 ,  H01L29/42344 ,  H01L29/518 ,  H01L29/66833 ,  H01L29/792

Abstract: A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.

公开(公告)号：US08963226B2

公开(公告)日：2015-02-24

申请号：US13970703

申请日：2013-08-20

Applicant: Renesas Electronics Corporation

Inventor： Tsutomu Okazaki ,  Daisuke Okada ,  Kyoya Nitta ,  Toshihiro Tanaka ,  Akira Kato ,  Toshikazu Matsui ,  Yasushi Ishii ,  Digh Hisamoto ,  Kan Yasui

IPC: H01L29/768 ,  H01L29/792 ,  G11C16/04 ,  H01L21/28 ,  H01L27/02 ,  H01L27/115 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L27/1157 ,  G11C16/0425 ,  H01L21/28282 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/0649 ,  H01L29/4234 ,  H01L29/42344 ,  H01L29/518 ,  H01L29/66833 ,  H01L29/792

Abstract: A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.

Abstract translation: 半导体存储器阵列包括具有第一电荷存储层和第一非易失性存储单元的第一非易失性存储单元，第一非易失性存储单元与第一存储单元相邻，具有第二电荷存储层和第二栅电极 。 第一电极和第二电极在垂直于第一方向的第二方向上延伸，第一电极具有在第一方向上朝向第二电极延伸的第一接触部分，并且第二电极具有朝向第一电极的第二接触部分 第一个方向 第一和第二接触位置分别沿第二方向移动，第一电极和第一接触部分与第二电极和第二接触部分电气分离。