公开(公告)号：US20160163882A1

公开(公告)日：2016-06-09

申请号：US15040935

申请日：2016-02-10

Applicant: Renesas Electronics Corporation

Inventor： Fukuo OWADA

IPC: H01L29/792 ,  H01L29/423 ,  H01L27/115

CPC classification number: H01L29/792 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02238 ,  H01L21/02326 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/511 ,  H01L29/518 ,  H01L29/66833

Abstract: To provide a semiconductor device with nonvolatile memory, having improved performance.A memory cell has control and memory gate electrodes on a semiconductor substrate via an insulating film and another insulating film having first, second, and third films stacked one after another in order of mention, respectively. The memory and control gate electrodes are adjacent to each other via the stacked insulating film. The second insulating film has a charge accumulation function. The first and third insulating films each have a band gap greater than that of the second insulating film. An inner angle of the second insulating film between a portion extending between the semiconductor substrate and the memory gate electrode and a portion extending between the control gate electrode and the memory gate electrode is ≧90°. An inner angle of the corner portion between the lower surface and the side surface of the memory gate electrode is

公开(公告)号：US20150129953A1

公开(公告)日：2015-05-14

申请号：US14538803

申请日：2014-11-11

Applicant: Renesas Electronics Corporation

Inventor： Fukuo OWADA

IPC: H01L29/792 ,  H01L21/02 ,  H01L21/28 ,  H01L21/3213 ,  H01L29/66 ,  H01L29/51

CPC classification number: H01L29/792 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02238 ,  H01L21/02326 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/511 ,  H01L29/518 ,  H01L29/66833

Abstract: To provide a semiconductor device with nonvolatile memory, having improved performance.A memory cell has control and memory gate electrodes on a semiconductor substrate via an insulating film and another insulating film having first, second, and third films stacked one after another in order of mention, respectively. The memory and control gate electrodes are adjacent to each other via the stacked insulating film. The second insulating film has a charge accumulation function. The first and third insulating films each have a band gap greater than that of the second insulating film. An inner angle of the second insulating film between a portion extending between the semiconductor substrate and the memory gate electrode and a portion extending between the control gate electrode and the memory gate electrode is ≧90°. An inner angle of the corner portion between the lower surface and the side surface of the memory gate electrode is

Abstract translation: 为了提供具有非易失性存储器的半导体器件，具有改进的性能。 存储单元经由绝缘膜在半导体衬底上具有控制和存储栅电极，另一绝缘膜分别具有依次层叠的第一，第二和第三膜。 存储器和控制栅电极通过堆叠的绝缘膜彼此相邻。 第二绝缘膜具有电荷累积功能。 第一和第三绝缘膜各自具有大于第二绝缘膜的带隙。 在半导体衬底和存储栅电极之间延伸的部分和在控制栅电极和存储栅电极之间延伸的部分之间的第二绝缘膜的内角为≥90°。 存储栅电极的下表面和侧表面之间的角部的内角<90°。

公开(公告)号：US20160086961A1

公开(公告)日：2016-03-24

申请号：US14860700

申请日：2015-09-21

Applicant: Renesas Electronics Corporation

Inventor： Fukuo OWADA ,  Masaaki SHINOHARA ,  Takahiro MARUYAMA

IPC: H01L27/115

CPC classification number: H01L27/11546 ,  H01L27/11529

Abstract: An improvement is achieved in the performance of a semiconductor device. Over a first insulating film formed over a main surface of a semiconductor substrate located in a memory formation region and having an internal charge storage portion and over a second insulating film formed over the main surface of the semiconductor substrate located in a main circuit formation region, a conductive film is formed. Then, in the memory formation region, the conductive film and the first insulating film are patterned to form a first gate electrode and a first gate insulating film while, in the main circuit formation region, the conductive film and the second insulating film are left. Then, in the main circuit formation region, the conductive film and the second insulating film are patterned to form a second gate electrode and a second gate insulating film.

Abstract translation: 在半导体器件的性能方面实现了改进。 在位于存储器形成区域中的具有内部电荷存储部分的半导体衬底的主表面上形成的第一绝缘膜上，以及形成在位于主电路形成区域中的半导体衬底的主表面上的第二绝缘膜之上， 形成导电膜。 然后，在存储器形成区域中，对导电膜和第一绝缘膜进行构图以形成第一栅电极和第一栅极绝缘膜，同时在主电路形成区域中留下导电膜和第二绝缘膜。 然后，在主电路形成区域中，对导电膜和第二绝缘膜进行构图以形成第二栅极电极和第二栅极绝缘膜。

公开(公告)号：US20160093499A1

公开(公告)日：2016-03-31

申请号：US14869988

申请日：2015-09-29

Applicant: Renesas Electronics Corporation

Inventor： Kazuharu YAMABE ,  Shinichiro ABE ,  Shoji YOSHIDA ,  Hideaki YAMAKOSHI ,  Toshio KUDO ,  Seiji MURANAKA ,  Fukuo OWADA ,  Daisuke OKADA

IPC: H01L21/28 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L21/28282 ,  H01L21/28194 ,  H01L29/66833 ,  H01L29/792

Abstract: To provide a semiconductor device having improved performance while improving the throughput in the manufacturing steps of the semiconductor device. An insulating film portion comprised of first, second, third, fourth, and fifth insulating films is formed on a semiconductor substrate. The second insulating film is a first charge storage film and the fourth insulating film is a second charge storage film. The first charge storage film contains silicon and nitrogen; the third insulating film contains silicon and oxygen; and the second charge storage film contains silicon and nitrogen. The thickness of the third insulating film is smaller than that of the first charge storage film and the thickness of the second charge storage film is greater than that of the first charge storage film. The third insulating film is formed by treating the upper surface of the first charge storage film with a water-containing treatment liquid.

Abstract translation: 提供具有改进性能的半导体器件，同时提高半导体器件的制造步骤中的吞吐量。 在半导体衬底上形成由第一，第二，第三，第四和第五绝缘膜构成的绝缘膜部分。 第二绝缘膜是第一电荷存储膜，第四绝缘膜是第二电荷存储膜。 第一电荷储存膜含有硅和氮; 第三绝缘膜含有硅和氧; 并且第二电荷储存膜含有硅和氮。 第三绝缘膜的厚度小于第一电荷存储膜的厚度，并且第二电荷存储膜的厚度大于第一电荷存储膜的厚度。 第三绝缘膜通过用含水处理液处理第一电荷存储膜的上表面而形成。