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Patent Agency Ranking
公开(公告)号：US20170310904A1
公开(公告)日：2017-10-26
申请号：US15647522
申请日：2017-07-12
Applicant: Renesas Electronics Corporation
Inventor： Hideaki KIDO , Shoji MURAMATSU , Hiroyuki HAMASAKI , Akihiro YAMAMOTO
CPC classification number: H04N5/247 , B60R1/00 , B60R2300/60 , G06T3/00 , G06T3/20 , G06T5/006 , G06T2207/10016 , G06T2207/20172 , G06T2207/30252 , H04N5/21 , H04N7/18
Abstract: Means which enables image conversion in which a plurality of conversion results can be output without once saving all of video-image data, which has been input from image-pickup means, in a storage medium is provided. A single line memory having a plurality of lines is used while switching the role thereof for a reading use by a video-image converting means and a use for inputting image data from the image-pickup means. The image converting means obtains an input image, which is in the line memory, and carries out conversion of the input image based on a conversion specifying means interpreted by an instruction decoder.
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公开(公告)号：US20180241964A1
公开(公告)日：2018-08-23
申请号：US15961985
申请日：2018-04-25
Applicant: Renesas Electronics Corporation
Inventor： Hiroyuki HAMASAKI , Atsushi NAKAMURA , Manabu KOIKE , Hideaki KIDO , Nobuyasu KANEKAWA
CPC classification number: H04N5/77 , G06T1/20 , G06T1/60 , G06T2200/28 , H04N5/23229 , H04N5/265 , H04N5/91
Abstract: An image processing apparatus includes an image processing unit that calculates two types of image data from one image data and outputs the calculated image data, a data combination unit that combines the two type of data supplied from the image processing unit and outputs the combined data to one terminal, an output buffer that adjusts an output timing of the combined data according to an instruction supplied from bus arbitration means for arbitrating a bus, and a data distribution unit that outputs the combined data output from the output buffer to the bus in a form of the combined data, or distributes the combined data and outputs the distributed data to the bus according to an external combination distribution instruction.
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公开(公告)号：US20170034471A1
公开(公告)日：2017-02-02
申请号：US15290831
申请日：2016-10-11
Applicant: Renesas Electronics Corporation
Inventor： Hiroyuki HAMASAKI , Atsushi NAKAMURA , Manabu KOIKE , Hideaki KIDO , Nobuyasu KANEKAWA
CPC classification number: H04N5/77 , G06T1/20 , G06T1/60 , G06T2200/28 , H04N5/23229 , H04N5/265 , H04N5/91
Abstract: An image processing apparatus includes an image processing unit that calculates two types of image data from one image data and outputs the calculated image data, a data combination unit that combines the two type of data supplied from the image processing unit and outputs the combined data to one terminal, an output buffer that adjusts an output timing of the combined data according to an instruction supplied from bus arbitration means for arbitrating a bus, and a data distribution unit that outputs the combined data output from the output buffer to the bus in a form of the combined data, or distributes the combined data and outputs the distributed data to the bus according to an external combination distribution instruction.
Abstract translation: 图像处理装置包括图像处理单元，其从一个图像数据计算两种图像数据并输出计算出的图像数据;数据组合单元，其组合从图像处理单元提供的两种数据，并将该组合数据输出到 一个终端，输出缓冲器，根据从用于仲裁总线的总线仲裁装置提供的指令调整组合数据的输出定时;以及数据分配单元，其以从形式输出从输出缓冲器输出到总线的组合数据 或者分发组合数据，并根据外部组合分配指令将分布式数据输出到总线。
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公开(公告)号：US20190020849A1
公开(公告)日：2019-01-17
申请号：US16133351
申请日：2018-09-17
Applicant: Renesas Electronics Corporation
Inventor： Hiroyuki HAMASAKI , Atsushi NAKAMURA , Manabu KOIKE , Hideaki KIDO , Nobuyasu KANEKAWA
CPC classification number: H04N5/77 , G06T1/20 , G06T1/60 , G06T2200/28 , H04N5/23229 , H04N5/265 , H04N5/91
Abstract: An image processing apparatus includes an image processing unit that calculates two types of image data from one image data and outputs the calculated image data, a data combination unit that combines the two type of data supplied from the image processing unit and outputs the combined data to one terminal, an output buffer that adjusts an output timing of the combined data according to an instruction supplied from bus arbitration means for arbitrating a bus, and a data distribution unit that outputs the combined data output from the output buffer to the bus in a form of the combined data, or distributes the combined data and outputs the distributed data to the bus according to an external combination distribution instruction.
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公开(公告)号：US20160259596A1
公开(公告)日：2016-09-08
申请号：US15157310
申请日：2016-05-17
Applicant: Renesas Electronics Corporation
Inventor： Hideaki KIDO , Shoji Muramatsu , Hiroyuki Hamasaki , Akihiro Yamamoto
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0673 , G06F9/30087 , G06K9/00805
Abstract: Provided is an image processing device capable of an image processing with using a general-purpose image processing hardware in accordance with video input without mediation of a CPU. The image processing device includes: a storage medium for storing an image data acquired by video inputting unit for acquiring video images; a CPU for a general processing; image processing unit for processing the image data stored in the storage medium; setting unit for determining a processing content of the image processing unit; a command list indicating an order of setting and activating the image processing unit; and command writing unit for setting and activating the image processing unit based on the command list in synchronization with input of the image data from the video inputting unit without mediation of the CPU.
Abstract translation: 提供了一种图像处理装置，其能够根据视频输入而使用通用图像处理硬件进行图像处理，而无需中介CPU。 该图像处理装置包括：存储介质，用于存储由用于获取视频图像的视频输入单元获取的图像数据; 用于一般处理的CPU; 图像处理单元，用于处理存储在存储介质中的图像数据; 设置单元，用于确定图像处理单元的处理内容; 指示设置和激活图像处理单元的顺序的命令列表; 以及命令写入单元，用于根据来自视频输入单元的图像数据的输入同步地基于命令列表设置和激活图像处理单元，而无需CPU的中介。
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