公开(公告)号：US20130162458A1

公开(公告)日：2013-06-27

申请号：US13707198

申请日：2012-12-06

Applicant: Renesas Electronics Corporation

Inventor： Osamu NISHIKIDO ,  Yasutoshi AIBARA ,  Hirokazu SHIMIZU ,  Satoshi TATSUKAWA ,  Takayoshi SHIGEKURA

IPC: H03M1/50

CPC classification number: H04N5/378 ,  H03M1/0863 ,  H03M1/123 ,  H03M1/50 ,  H03M1/56 ,  H04N5/3577 ,  H04N5/374

Abstract: There is a need to provide an AD converter capable of reducing occurrence of a noise. An AD converter includes an operational amplifier and a clip circuit. The operational amplifier receives ramp voltage and voltage for an analog signal and allows output terminal voltage to transition from an H level to an L level when a change in the ramp voltage reaches the voltage for the analog signal. The clip circuit fixes an output terminal of the operational amplifier to clipping voltage after output voltage for the operational amplifier reaches threshold voltage for a latch circuit. Therefore, the AD converter can limit a range of output voltage, as a source of noise, for the operational amplifier and eliminate an unnecessary change in the output voltage after the threshold voltage for the latch circuit is reached.

Abstract translation: 需要提供能够减少噪声发生的AD转换器。 AD转换器包括运算放大器和钳位电路。 当斜坡电压的变化达到模拟信号的电压时，运算放大器接收模拟信号的斜坡电压和电压，并允许输出端电压从H电平转换到L电平。 钳位电路在运算放大器的输出电压达到锁存电路的阈值电压之后，将运算放大器的输出端固定为钳位电压。 因此，AD转换器可以限制作为运算放大器的噪声源的输出电压的范围，并且在达到锁存电路的阈值电压之后消除输出电压的不必要的变化。

公开(公告)号：US20190007634A1

公开(公告)日：2019-01-03

申请号：US15984589

申请日：2018-05-21

Applicant: Renesas Electronics Corporation

Inventor： Hirokazu SHIMIZU

IPC: H04N5/365 ,  H04N5/378 ,  H04N5/369 ,  H04N5/376 ,  H04N5/345 ,  H01L27/146

CPC classification number: H04N5/3658 ,  H01L27/14621 ,  H01L27/14645 ,  H04N5/2176 ,  H04N5/345 ,  H04N5/35581 ,  H04N5/3675 ,  H04N5/3698 ,  H04N5/3765 ,  H04N5/378

Abstract: Conventional image sensors cannot generate highly-accurate correction values in a short time. In calibration operation, an image sensor according to an embodiment: categorizes a plurality of pixel circuits, which are arranged in a grid of columns and rows in an effective pixel area, on a row-by-row basis into an imaging pixel circuit group and a calibration pixel circuit group; controls the pixel circuits belonging to the imaging pixel circuit group to output imaging signals; electrically cuts off the pixel circuits belonging to the calibration pixel circuit group from vertical readout lines and supplies a calibration voltage to the vertical readout lines at the time when the pixel circuits belonging to the calibration pixel circuit group are read; generates imaging data corresponding to the voltage level of the imaging signal input through the vertical readout lines and calibration data corresponding to the voltage level of the calibration voltage; generates pixel data by applying a correction value to the imaging data while accumulating calibration data; and updates the correction value to an updated correction value generated based on a predetermined number of the calibration data pieces.