公开(公告)号：US20140124654A1

公开(公告)日：2014-05-08

申请号：US14067929

申请日：2013-10-30

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Osamu NISHIKIDO

IPC: H04N5/378

CPC classification number: H04N5/3597 ,  H04N5/363 ,  H04N5/37457

Abstract: As a reset transistor is turned on, an FD (Floating Diffusion) is reset to VDD and then stores charges transferred from a light receiving element. By a source-follower circuit formed by an amplifying transistor, a selection transistor and a current source, a voltage in accordance with a potential of FD is output to a data line. A second output circuit generates an output voltage VOUT in accordance with the potential of FD at an output node. Output transistors in output circuit are configured to generate a potential difference equivalent to the potential difference between FD and data line caused by the amplifying transistor and selection transistor, between data line and output node.

Abstract translation: 当复位晶体管导通时，FD（浮动扩散）被复位到VDD，然后存储从光接收元件传送的电荷。 通过由放大晶体管，选择晶体管和电流源形成的源极跟随器电路，将根据FD的电位的电压输出到数据线。 第二输出电路根据输出节点处的FD的电位产生输出电压VOUT。 输出电路中的输出晶体管被配置为产生与由数据线和输出节点之间的放大晶体管和选择晶体管引起的FD和数据线之间的电位差的电位差。

公开(公告)号：US20180343405A1

公开(公告)日：2018-11-29

申请号：US16053064

申请日：2018-08-02

Applicant: Renesas Electronics Corporation

Inventor： Osamu NISHIKIDO

IPC: H04N5/355 ,  H04N9/04 ,  H04N5/3745

CPC classification number: H04N5/35581 ,  H04N5/37452 ,  H04N5/37457 ,  H04N9/045

Abstract: An image sensor device includes a plurality of pixel cells arranged in a matrix in a pixel array, and a timing control circuit that controls read-out of pixel information from the plurality of pixel cells. Each of the plurality of pixel cells includes a photodiode, a transfer transistor provided between the photodiode and a floating diffusion, a node reset transistor provided between a power supply terminal and the floating diffusion, a read-out capacitor whose one end is connected to the power supply terminal, a capacitor reset transistor provided between another end of the read-out capacitor and the floating diffusion, an amplification transistor that amplifies a voltage generated based on electric charges accumulated in the floating diffusion, and a selection transistor provided between the amplification transistor and a read-out line.

公开(公告)号：US20140152879A1

公开(公告)日：2014-06-05

申请号：US14174236

申请日：2014-02-06

Applicant: Renesas Electronics Corporation

Inventor： Osamu NISHIKIDO ,  Yasutoshi Aibara ,  Hirokazu Shimizu ,  Satoshi Tatsukawa ,  Takayoshi Shigekura

IPC: H04N5/378

CPC classification number: H04N5/378 ,  H03M1/0863 ,  H03M1/123 ,  H03M1/50 ,  H03M1/56 ,  H04N5/3577 ,  H04N5/374

Abstract: There is a need to provide an AD converter capable of reducing occurrence of a noise. An AD converter includes an operational amplifier and a clip circuit. The operational amplifier receives ramp voltage and voltage for an analog signal and allows output terminal voltage to transition from an H level to an L level when a change in the ramp voltage reaches the voltage for the analog signal. The clip circuit fixes an output terminal of the operational amplifier to clipping voltage after output voltage for the operational amplifier reaches threshold voltage for a latch circuit. Therefore, the AD converter can limit a range of output voltage, as a source of noise, for the operational amplifier and eliminate an unnecessary change in the output voltage after the threshold voltage for the latch circuit is reached.

Abstract translation: 需要提供能够减少噪声发生的AD转换器。 AD转换器包括运算放大器和钳位电路。 当斜坡电压的变化达到模拟信号的电压时，运算放大器接收模拟信号的斜坡电压和电压，并允许输出端电压从H电平转换到L电平。 钳位电路在运算放大器的输出电压达到锁存电路的阈值电压之后，将运算放大器的输出端固定为钳位电压。 因此，AD转换器可以限制作为运算放大器的噪声源的输出电压的范围，并且在达到锁存电路的阈值电压之后消除输出电压的不必要的变化。

公开(公告)号：US20190007637A1

公开(公告)日：2019-01-03

申请号：US16005787

申请日：2018-06-12

Applicant: Renesas Electronics Corporation

Inventor： Osamu NISHIKIDO

IPC: H04N5/378 ,  H04N5/359 ,  H04N5/365 ,  H04N5/341

Abstract: The present disclosure is provided to solve a problem that a signal obtained by imaging with low illumination cannot be amplified while suppressing random noise. An AD converter outputs n bits. A digital converting unit converts each of P pieces of analog signals output from the same place at different times to a digital value of (n−m) bits. An addition circuit integrates P pieces of the converted digital values. Here, n denotes a natural number of 1 or larger, m denotes a natural number of 1 or larger and less than n, and P denotes a natural number of 1 or larger and m or less.

公开(公告)号：US20170070691A1

公开(公告)日：2017-03-09

申请号：US15221458

申请日：2016-07-27

Applicant: Renesas Electronics Corporation

Inventor： Osamu NISHIKIDO

IPC: H04N5/355 ,  H04N5/376 ,  H04N5/3745 ,  H04N5/378

CPC classification number: H04N5/35581 ,  H04N5/37452 ,  H04N5/37457 ,  H04N9/045

Abstract: Image sensor devices of related art have a problem that a circuit area increases. According to one embodiment, an image sensor device includes a read-out capacitor (28) that accumulates first pixel information to be output from a photodiode which is exposed to light with a first exposure time. In addition to the first pixel information, second pixel information to be output from the photodiode which is exposed to light with a second exposure time longer than the first exposure time is generated. After the first pixel information and the second pixel information are read out separately, the two pieces of pixel information are synthesized to thereby generate output image information.

Abstract translation: 现有技术的图像传感器装置具有电路面积增加的问题。 根据一个实施例，图像传感器装置包括一个读出电容器（28），该读出电容器累积从第一曝光时间暴露于光的光电二极管输出的第一像素信息。 除了第一像素信息之外，还产生从第二曝光时间比第一曝光时间长的曝光于光的光电二极管输出的第二像素信息。 在分别读出第一像素信息和第二像素信息之后，合成两个像素信息，从而生成输出图像信息。

公开(公告)号：US20130162458A1

公开(公告)日：2013-06-27

申请号：US13707198

申请日：2012-12-06

Applicant: Renesas Electronics Corporation

Inventor： Osamu NISHIKIDO ,  Yasutoshi AIBARA ,  Hirokazu SHIMIZU ,  Satoshi TATSUKAWA ,  Takayoshi SHIGEKURA

IPC: H03M1/50

CPC classification number: H04N5/378 ,  H03M1/0863 ,  H03M1/123 ,  H03M1/50 ,  H03M1/56 ,  H04N5/3577 ,  H04N5/374

Abstract: There is a need to provide an AD converter capable of reducing occurrence of a noise. An AD converter includes an operational amplifier and a clip circuit. The operational amplifier receives ramp voltage and voltage for an analog signal and allows output terminal voltage to transition from an H level to an L level when a change in the ramp voltage reaches the voltage for the analog signal. The clip circuit fixes an output terminal of the operational amplifier to clipping voltage after output voltage for the operational amplifier reaches threshold voltage for a latch circuit. Therefore, the AD converter can limit a range of output voltage, as a source of noise, for the operational amplifier and eliminate an unnecessary change in the output voltage after the threshold voltage for the latch circuit is reached.

Abstract translation: 需要提供能够减少噪声发生的AD转换器。 AD转换器包括运算放大器和钳位电路。 当斜坡电压的变化达到模拟信号的电压时，运算放大器接收模拟信号的斜坡电压和电压，并允许输出端电压从H电平转换到L电平。 钳位电路在运算放大器的输出电压达到锁存电路的阈值电压之后，将运算放大器的输出端固定为钳位电压。 因此，AD转换器可以限制作为运算放大器的噪声源的输出电压的范围，并且在达到锁存电路的阈值电压之后消除输出电压的不必要的变化。