公开(公告)号：US09349727B2

公开(公告)日：2016-05-24

申请号：US14598127

申请日：2015-01-15

Applicant: Renesas Electronics Corporation

Inventor： Kazuaki Deguchi ,  Yasuo Morimoto ,  Masao Ito

IPC: H01L27/088 ,  H01L21/8234 ,  H01L27/02 ,  H01L29/78

CPC classification number: H01L27/088 ,  H01L21/823425 ,  H01L27/0207 ,  H01L29/7846

Abstract: In a semiconductor device, an active region includes: a first impurity region to which a predetermined voltage is applied; second and third impurity regions forming a pair of conductive electrodes of an insulated gate field effect transistor; and at least one impurity region disposed between the first and second impurity regions. A voltage that causes electrical conduction between the second and third impurity regions is applied to a gate electrode disposed between the second and third impurity regions. All gate electrodes disposed between the first and second impurity regions are configured to be electrically connected to the first impurity region constantly. All impurity regions disposed between the first and second impurity regions are electrically isolated from the first and second impurity regions and maintained in a floating state.

Abstract translation: 在半导体器件中，有源区包括：施加预定电压的第一杂质区; 形成绝缘栅场效应晶体管的一对导电电极的第二和第三杂质区; 以及设置在第一和第二杂质区域之间的至少一个杂质区域。 将引起第二和第三杂质区之间导电的电压施加到设置在第二和第三杂质区之间的栅电极。 设置在第一和第二杂质区域之间的所有栅极电极被配置为恒定地电连接到第一杂质区域。 设置在第一和第二杂质区域之间的所有杂质区域与第一和第二杂质区域电隔离并保持在浮置状态。

公开(公告)号：US09258009B2

公开(公告)日：2016-02-09

申请号：US14435940

申请日：2012-10-17

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazuaki Deguchi ,  Masao Ito

IPC: H03M1/38 ,  H03M1/46 ,  H03M1/12 ,  H03K5/159 ,  H03M1/00 ,  H03M1/06

CPC classification number: H03M1/002 ,  H03K5/159 ,  H03M1/0624 ,  H03M1/125 ,  H03M1/38 ,  H03M1/462

Abstract: A successive approximation type AD converter includes: a comparator comparing an analog input signal and a DA-converted comparison code; and a control circuit. When an output of the comparator settles before a limit time period has passed since the comparator started a comparison operation, the control circuit updates the comparison code on the basis of the settled output of the comparator. When the limit time period has passed before the output of the comparator settles, the control circuit updates the comparison code not on the basis of the present output of the comparator.

Abstract translation: 逐次逼近型AD转换器包括：比较模拟输入信号和DA转换的比较码的比较器; 和控制电路。 当比较器开始比较操作之后，比较器的输出在经过极限时间之前已经结束，控制电路根据比较器的稳定输出来更新比较代码。 当在比较器的输出结束之前经过了限制时间段时，控制电路不是基于比较器的当前输出来更新比较代码。

公开(公告)号：US20150123207A1

公开(公告)日：2015-05-07

申请号：US14598127

申请日：2015-01-15

Applicant: Renesas Electronics Corporation

Inventor： Kazuaki Deguchi ,  Yasuo Morimoto ,  Masao Ito

IPC: H01L27/088

CPC classification number: H01L27/088 ,  H01L21/823425 ,  H01L27/0207 ,  H01L29/7846

Abstract: In a semiconductor device, an active region includes: a first impurity region to which a predetermined voltage is applied; second and third impurity regions forming a pair of conductive electrodes of an insulated gate field effect transistor; and at least one impurity region disposed between the first and second impurity regions. A voltage that causes electrical conduction between the second and third impurity regions is applied to a gate electrode disposed between the second and third impurity regions. All gate electrodes disposed between the first and second impurity regions are configured to be electrically connected to the first impurity region constantly. All impurity regions disposed between the first and second impurity regions are electrically isolated from the first and second impurity regions and maintained in a floating state.

Abstract translation: 在半导体器件中，有源区包括：施加预定电压的第一杂质区; 形成绝缘栅场效应晶体管的一对导电电极的第二和第三杂质区; 以及设置在第一和第二杂质区域之间的至少一个杂质区域。 将引起第二和第三杂质区之间导电的电压施加到设置在第二和第三杂质区之间的栅电极。 设置在第一和第二杂质区域之间的所有栅极电极被配置为恒定地电连接到第一杂质区域。 设置在第一和第二杂质区域之间的所有杂质区域与第一和第二杂质区域电隔离并保持在浮置状态。