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1.发明授权Method and apparatus for addressing multiple devices simultaneously over a data bus 失效通过数据总线同时寻址多个设备的方法和装置公开(公告)号：US06931468B2
公开(公告)日：2005-08-16
申请号：US10067932
申请日：2002-02-06
CPC分类号： G06F13/4291
摘要： Techniques are provided for simultaneously addressing multiple devices on a data bus, such as by transmitting over a data bus a single message that is received and processed by multiple devices on the bus. Multiple devices may be simultaneously addressed using the standard bus architecture and protocol, without affecting the operation of other devices on the bus. In particular, a master device may address a first subset of the plurality of devices on the bus using a primary address shared by the first subset of the plurality of devices. The master device may address a second subset of the plurality of devices using a secondary address shared by the second subset of the plurality of devices. The second subset is a subset of the first subset. The master device may then transmit information over the bus to the second subset of the plurality of devices.
摘要翻译： 提供了用于同时寻址数据总线上的多个设备的技术，例如通过数据总线发送由总线上的多个设备接收和处理的单个消息。 可以使用标准总线架构和协议同时寻址多个设备，而不影响总线上其他设备的操作。 特别地，主设备可以使用多个设备的第一子集共享的主地址来寻址总线上的多个设备的第一子集。 主设备可以使用由多个设备的第二子集共享的辅助地址来寻址多个设备的第二子集。 第二子集是第一子集的子集。 然后，主设备可以通过总线将信息发送到多个设备的第二子集。
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公开(公告)号：US06854065B2
公开(公告)日：2005-02-08
申请号：US09918767
申请日：2001-07-30
摘要： A dual power source system includes a first power source and a second power source operably coupled with an electrical device, as well as a switching mechanism capable of selecting between the first and second power sources. An uninterruptible power supply (UPS) is place in line with one of the first and second power sources leading to the electrical device. Sense circuitry is capable of identifying a power failure condition in either the first or second power sources. A controller utilizes signals from the sense circuitry to selectively switch between the first and second power sources while configuring the UPS in a manner of providing for a plurality of operational states that accommodate the electrical device with operational power despite any combination of power failures in the first and second power sources.
摘要翻译： 双电源系统包括可操作地与电气设备耦合的第一电源和第二电源，以及能够在第一和第二电源之间进行选择的开关机构。 不间断电源（UPS）与通向电气设备的第一和第二电源之一配合。 检测电路能够识别第一或第二电源中的电源故障状况。 控制器利用来自感测电路的信号来选择性地在第一和第二电源之间切换，同时以提供容纳电气设备的多个操作状态的方式配置UPS，尽管在第一和第二电源中的电源故障的任何组合 和第二电源。
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3.发明授权Method and apparatus for ascertaining the status of multiple devices simultaneously over a data bus 有权用于通过数据总线同时确定多个设备的状态的方法和装置公开(公告)号：US06912607B2
公开(公告)日：2005-06-28
申请号：US10068029
申请日：2002-02-06
申请人： Robert B. Smith , Edward A Cross
发明人： Robert B. Smith , Edward A Cross
CPC分类号： G06F13/4291
摘要： Techniques are provided for simultaneously ascertaining the status of a plurality of devices coupled to a data bus. A master device transmits at least one status request message over the data bus to a plurality of slave devices. In response, the plurality of slave devices transmit to the master device a status indicator message including a plurality of status indicators indicating statuses of the plurality of slave devices. The master device receives the status indicator message and ascertains the status of at least some of the plurality of slave devices by examining the status indicators. The status request message and/or status indicator message may be a message defined according to a protocol associated with the data bus. The data bus may, for example, be a serial data bus such as an I2C bus.
摘要翻译： 提供了用于同时确定耦合到数据总线的多个设备的状态的技术。 主设备通过数据总线将至少一个状态请求消息发送到多个从设备。 作为响应，多个从设备向主设备发送包括指示多个从设备的状态的多个状态指示符的状态指示符消息。 主设备通过检查状态指示器来接收状态指示符消息并确定多个从设备中的至少一些从设备的状态。 状态请求消息和/或状态指示符消息可以是根据与数据总线相关联的协议定义的消息。 数据总线可以例如是串行数据总线，例如I C总线。
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4.发明授权Method for accessing scan chains and updating EEPROM-resident FPGA code through a system management processor and JTAG bus 有权通过系统管理处理器和JTAG总线访问扫描链和更新EEPROM驻留的FPGA代码的方法公开(公告)号：US06883109B2
公开(公告)日：2005-04-19
申请号：US09918030
申请日：2001-07-30
IPC分类号： G06F11/00 , G01R31/3185 , G06F9/24 , G06F9/38 , G06F17/50
CPC分类号： G01R31/318558 , G06F9/24 , G06F9/3861 , G06F17/5054
摘要： A method of updating programmable device configuration code stored in EEPROMs of a system is operable on complex systems having separate management and system processors. The method includes executing a sequence for updating programmable device configuration code on a management processor of the system including erasing the EEPROMs, writing at least one block of configuration code to the EEPROMs, and checking for errors after writing. The errors checked for include failure of a FIFO to empty. Upon detecting errors, the method includes automatically retrying writes. Embodiments of the method are operable on systems having multiple serial busses interconnecting EEPROMs to a common configuration logic, and on systems having multiple management processors each capable of accessing the common configuration logic.
摘要翻译： 存储在系统的EEPROM中的可更新可编程设备配置码的方法可在具有独立管理和系统处理器的复杂系统上操作。 该方法包括执行用于在系统的管理处理器上更新可编程设备配置代码的序列，包括擦除EEPROM，将至少一个配置代码块写入EEPROM，以及在写入后检查错误。 检查的错误包括FIFO清空的故障。 在检测到错误时，该方法包括自动重试写入。 该方法的实施例可用于具有将EEPROM互连到公共配置逻辑的多个串行总线的系统，以及具有多个能够访问公共配置逻辑的多个管理处理器的系统。
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5.发明授权System for detection and routing of platform events in a multi-cell computer 失效用于多小区计算机中的平台事件的检测和路由的系统公开(公告)号：US06910142B2
公开(公告)日：2005-06-21
申请号：US09917413
申请日：2001-07-28
CPC分类号： G05B19/0428 , G05B2219/24025
摘要： A system for providing notification, to the associated operating system, of removal and replacement of I/O devices during operation of a multiprocessor computer system running multiple operating systems. The system includes a plurality of cells, each containing multiple RISC processors, low-level I/O firmware, a local service processor, scratch RAM, external registers, a memory and I/O manager, and interfacing hardware. Each partition comprises one or more cells and runs its own operating system (OS). Each cell is connected to a peripheral backplane containing a plurality of peripheral I/O card slots via a switch on the system backplane, which also connects the cell to a supervisory processor, which sends card slot status information to the appropriate cell. Each I/O (typically PCI) card slot has an associated latch which provides an indication, to the supervisory processor, that a platform event has occurred. Platform events include inserting or removing an I/O (peripheral device interface) card to/from a card slot, and opening an access panel that provides access to the I/O cards.
摘要翻译： 在运行多个操作系统的多处理器计算机系统的操作期间向相关联的操作系统提供对I / O设备的移除和替换的通知的系统。 该系统包括多个单元，每个单元包含多个RISC处理器，低级I / O固件，本地服务处理器，临时RAM，外部寄存器，存储器和I / O管理器以及接口硬件。 每个分区包括一个或多个单元并运行其自己的操作系统（OS）。 每个小区经由系统背板上的交换机连接到包含多个外围I / O卡插槽的外围背板，该外部设备也将小区连接到监控处理器，监控处理器将卡槽状态信息发送到适当的小区。 每个I / O（通常为PCI）卡槽具有相关联的锁存器，其向监控处理器提供已发生平台事件的指示。 平台事件包括在卡插槽中插入或取出I / O（外围设备接口）卡，并打开提供对I / O卡的访问的访问面板。
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